seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

scripts/check-no-via-in-pad.py

"""Check via annuli against every SMT pad, including same-net pads on either face."""
import json,runpy,os,sys
from pathlib import Path
from shapely.geometry import Point
from shapely.strtree import STRtree
os.environ.setdefault('AUDIT_REPORT_PATH','design/copper-audit.json')
a=runpy.run_path('scripts/audit-copper.py');c=a['c'];pads=[p for p in c if p['type']=='pcb_smtpad'];shapes=[a['padshape'](p) for p in pads];tree=STRtree(shapes);violations=[];minimum=1e9
vias=[p for p in c if p['type']=='pcb_via']
if not vias:
 vias=[dict(p,pcb_via_id=f"{t['pcb_trace_id']}_{i}",outer_diameter=p.get('via_diameter',.3)) for t in c if t['type']=='pcb_trace' for i,p in enumerate(t['route']) if p['route_type']=='via']
for v in vias:
 via=Point(v['x'],v['y']).buffer(v['outer_diameter']/2,quad_segs=64)
 for i in tree.query(via.buffer(.100001)):
  p=pads[int(i)];clearance=via.distance(shapes[int(i)]);minimum=min(minimum,clearance)
  if clearance<.099999:violations.append(dict(via=v['pcb_via_id'],x=v['x'],y=v['y'],pad=p['pcb_smtpad_id'],port=p.get('pcb_port_id'),layer=p['layer'],clearanceMm=round(clearance,6),overlapAreaMm2=round(via.intersection(shapes[int(i)]).area,8)))
report=dict(viaCount=len(vias),smtPadCount=len(pads),circuitSha256=a['report']['circuitSha256'],rule='Via annulus must have 0.1 mm clearance from all SMT-pad copper, including same-net pads. Dogbone traces bridge that gap.',violations=violations)
Path(os.environ.get('PAD_AUDIT_REPORT','design/no-via-in-pad.json')).write_text(json.dumps(report,indent=2)+'\n');print('Via-to-SMT-pad clearance:',len({v['via'] for v in violations}),'vias violating 0.1 mm;',len(violations),'pad contacts')
if '--strict' in sys.argv and violations:raise SystemExit('No-via-in-pad check failed')

if '--strict' in sys.argv and not vias:raise SystemExit('No routed vias found; build the full board before validating this design')