seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

design/routing.ts

export const ddrSignals = [
  ...Array.from({length:13},(_,i)=>`DDR_A${i}`),
  ...Array.from({length:16},(_,i)=>`DDR_D${i}`),
  ...Array.from({length:3},(_,i)=>`DDR_BA${i}`),
  "DDR_CK","DDR_CKn","DDR_DQS0","DDR_DQSn0","DDR_DQS1","DDR_DQSn1",
  "DDR_DQM0","DDR_DQM1","DDR_CKE","DDR_CSn0","DDR_RASn","DDR_CASn","DDR_WEn","DDR_ODT","DDR_RESETn",
]
export const powerNets = ["GND","VDD_CORE","VDD_MPU","DDR_1V5","V1V8","RTC_1V8","V3V3","A3V3","SYS_5V","VIN_5V"]

export function phaseForNet(net:string) {
 if (net === "GND") return 6
 if (powerNets.includes(net)) return 5
 if (["XTALIN","XTALOUT","RTC_XTALIN","RTC_XTALOUT","DDR_VREF","DDR_VTP","DDR_ZQ"].includes(net)) return 1
 if (ddrSignals.includes(net)) return 2
 if (/^(MMC0_|SD_CD|USB0_|UART0_|SPI0_)/.test(net)) return 3
 return 4
}