seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

design/pre-fab-review.json

{
  "circuitSha256": "2e87a0446358f7054a1bba368ae394a62fa0aa878933c439b65452f5225fda89",
  "reviewDisposition": "HOLD: electrical-layout and manufacturing review required",
  "powerRouting": {
    "SW1": {
      "totalSegmentLengthMm": 2.5126610383315984,
      "widthsMm": [
        0.1
      ]
    },
    "SW2": {
      "totalSegmentLengthMm": 3.1126610383315985,
      "widthsMm": [
        0.1
      ]
    },
    "SW3": {
      "totalSegmentLengthMm": 1.7129999999999999,
      "widthsMm": [
        0.1
      ]
    },
    "VIN_5V": {
      "totalSegmentLengthMm": 18.288607486307093,
      "widthsMm": [
        0.1
      ]
    },
    "SYS_5V": {
      "totalSegmentLengthMm": 22.22678664788763,
      "widthsMm": [
        0.1
      ]
    },
    "VDD_MPU": {
      "totalSegmentLengthMm": 59.246976975055645,
      "widthsMm": [
        0.1
      ]
    },
    "VDD_CORE": {
      "totalSegmentLengthMm": 89.68395169697945,
      "widthsMm": [
        0.1
      ]
    },
    "DDR_1V5": {
      "totalSegmentLengthMm": 173.63200011508377,
      "widthsMm": [
        0.1
      ]
    }
  },
  "usb": {
    "USB0_DP": {
      "lengthMm": 35.46643700508063,
      "layers": [
        "inner2",
        "top"
      ]
    },
    "USB0_DM": {
      "lengthMm": 35.38215050378794,
      "layers": [
        "inner2",
        "top"
      ]
    }
  },
  "componentsWithoutMPN": [
    "TP_PB"
  ],
  "minimumCopperToBoardEdgeMm": [
    0.39891364999999723,
    "pcb_smtpad_485"
  ],
  "minimumCopperToNonPlatedHoleMm": [
    0.12166960553971577,
    "pcb_copper_pour_0"
  ],
  "minimumViaDrillEdgeGapMm": [
    0.253112887414926,
    "pcb_via_282",
    "pcb_via_339"
  ],
  "viaHoleDiametersMm": [
    0.15
  ]
}