seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

design/decoupling-validation.json

{
  "metric": "Planar distance from capacitor power-pad center to the associated BGA ball center projected onto the bottom layer. Electrical loop inductance is not simulated.",
  "summary": {
    "U1": {
      "capacitors": 72,
      "previousMeanMm": 9.171,
      "newMeanMm": 2.154,
      "newMaxMm": 4.22
    },
    "U3": {
      "capacitors": 18,
      "previousMeanMm": 6.539,
      "newMeanMm": 0.45,
      "newMaxMm": 1.311
    }
  },
  "capacitors": [
    {
      "capacitor": "C_U1_E5",
      "target": "U1.E5",
      "padToBallMm": 3.821,
      "previousPadToBallMm": 10.020184629037532
    },
    {
      "capacitor": "C_U1_E6",
      "target": "U1.E6",
      "padToBallMm": 1.8,
      "previousPadToBallMm": 3.531019682754545
    },
    {
      "capacitor": "C_U1_G5",
      "target": "U1.G5",
      "padToBallMm": 3.8049,
      "previousPadToBallMm": 11.091803279899981
    },
    {
      "capacitor": "C_U1_L5",
      "target": "U1.L5",
      "padToBallMm": 1.2166,
      "previousPadToBallMm": 12.040768247915079
    },
    {
      "capacitor": "C_U1_P5",
      "target": "U1.P5",
      "padToBallMm": 2.0396,
      "previousPadToBallMm": 11.368909358421325
    },
    {
      "capacitor": "C_U1_F6",
      "target": "U1.F6",
      "padToBallMm": 0.7211,
      "previousPadToBallMm": 4.933568688079654
    },
    {
      "capacitor": "C_DDR5",
      "target": "U3.B2",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 7.250285248128999
    },
    {
      "capacitor": "C_U1_N6",
      "target": "U1.N6",
      "padToBallMm": 1.4142,
      "previousPadToBallMm": 5.755354029075883
    },
    {
      "capacitor": "C_U1_E12",
      "target": "U1.E12",
      "padToBallMm": 3.9411,
      "previousPadToBallMm": 8.41546790143008
    },
    {
      "capacitor": "C_DDR11",
      "target": "U3.K8",
      "padToBallMm": 0.4,
      "previousPadToBallMm": 3.7502426431692375
    },
    {
      "capacitor": "C_U1_D10",
      "target": "U1.D10",
      "padToBallMm": 2.2091,
      "previousPadToBallMm": 12.855664121312442
    },
    {
      "capacitor": "C_U1_L6",
      "target": "U1.L6",
      "padToBallMm": 0.6325,
      "previousPadToBallMm": 5.443904848543919
    },
    {
      "capacitor": "C_U1_L7",
      "target": "U1.L7",
      "padToBallMm": 2.4739,
      "previousPadToBallMm": 1.9318643844742307
    },
    {
      "capacitor": "C_U1_F5",
      "target": "U1.F5",
      "padToBallMm": 0.6325,
      "previousPadToBallMm": 9.387017630749396
    },
    {
      "capacitor": "C_DDR0",
      "target": "U3.A1",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 6.588143643772879
    },
    {
      "capacitor": "C_DDR7",
      "target": "U3.H2",
      "padToBallMm": 1.3106,
      "previousPadToBallMm": 10.327494416752064
    },
    {
      "capacitor": "C_U1_E9",
      "target": "U1.E9",
      "padToBallMm": 2.0396,
      "previousPadToBallMm": 18.320373904481315
    },
    {
      "capacitor": "C_DDR9",
      "target": "U3.G7",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 8.069040558596605
    },
    {
      "capacitor": "C_DDR15",
      "target": "U3.H9",
      "padToBallMm": 0.4,
      "previousPadToBallMm": 5.809009707135376
    },
    {
      "capacitor": "C_DDR3",
      "target": "U3.N1",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 5.147449451565796
    },
    {
      "capacitor": "C_DDR8",
      "target": "U3.K2",
      "padToBallMm": 1.0198,
      "previousPadToBallMm": 5.3988469993735695
    },
    {
      "capacitor": "C_U1_G10",
      "target": "U1.G10",
      "padToBallMm": 0.4,
      "previousPadToBallMm": 10.875481598531625
    },
    {
      "capacitor": "C_U1_N5",
      "target": "U1.N5",
      "padToBallMm": 0.8246,
      "previousPadToBallMm": 9.97296846480525
    },
    {
      "capacitor": "C_U1_J5",
      "target": "U1.J5",
      "padToBallMm": 3.821,
      "previousPadToBallMm": 14.25103855864547
    },
    {
      "capacitor": "C_U1_K5",
      "target": "U1.K5",
      "padToBallMm": 2.8284,
      "previousPadToBallMm": 13.576011932817384
    },
    {
      "capacitor": "C_U1_G6",
      "target": "U1.G6",
      "padToBallMm": 0.6325,
      "previousPadToBallMm": 3.8992435163759644
    },
    {
      "capacitor": "C_U1_E11",
      "target": "U1.E11",
      "padToBallMm": 2.1541,
      "previousPadToBallMm": 9.271251263988049
    },
    {
      "capacitor": "C_U1_F7",
      "target": "U1.F7",
      "padToBallMm": 1.0,
      "previousPadToBallMm": 8.00525452437335
    },
    {
      "capacitor": "C_U1_D8",
      "target": "U1.D8",
      "padToBallMm": 2.2091,
      "previousPadToBallMm": 6.903050050521146
    },
    {
      "capacitor": "C_U1_F12",
      "target": "U1.F12",
      "padToBallMm": 3.4059,
      "previousPadToBallMm": 8.660952603495762
    },
    {
      "capacitor": "C_U1_H5",
      "target": "U1.H5",
      "padToBallMm": 2.8636,
      "previousPadToBallMm": 12.668863406004505
    },
    {
      "capacitor": "C_DDR14",
      "target": "U3.E9",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 6.319832479791297
    },
    {
      "capacitor": "C_U1_N8",
      "target": "U1.N8",
      "padToBallMm": 2.8284,
      "previousPadToBallMm": 4.47438263897937
    },
    {
      "capacitor": "C_U1_F13",
      "target": "U1.F13",
      "padToBallMm": 2.6,
      "previousPadToBallMm": 9.585202136627064
    },
    {
      "capacitor": "C_U1_L9",
      "target": "U1.L9",
      "padToBallMm": 1.4,
      "previousPadToBallMm": 11.552493237392522
    },
    {
      "capacitor": "C_DDR17",
      "target": "U3.R9",
      "padToBallMm": 0.2,
      "previousPadToBallMm": null
    },
    {
      "capacitor": "C_U1_E7",
      "target": "U1.E7",
      "padToBallMm": 1.0198,
      "previousPadToBallMm": 3.3781799833638235
    },
    {
      "capacitor": "C_U1_R16",
      "target": "U1.R16",
      "padToBallMm": 1.2166,
      "previousPadToBallMm": 11.173723640756469
    },
    {
      "capacitor": "C_U1_E14",
      "target": "U1.E14",
      "padToBallMm": 0.8944,
      "previousPadToBallMm": 13.5139964481274
    },
    {
      "capacitor": "C_U1_M13",
      "target": "U1.M13",
      "padToBallMm": 2.7203,
      "previousPadToBallMm": 6.36019653784378
    },
    {
      "capacitor": "C_U1_P11",
      "target": "U1.P11",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 10.180967537518228
    },
    {
      "capacitor": "C_U1_F9",
      "target": "U1.F9",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 10.824606228403876
    },
    {
      "capacitor": "C_U1_P6",
      "target": "U1.P6",
      "padToBallMm": 1.8111,
      "previousPadToBallMm": 6.896093096819386
    },
    {
      "capacitor": "C_DDR6",
      "target": "U3.D2",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 8.51656527928607
    },
    {
      "capacitor": "C_U1_D7",
      "target": "U1.D7",
      "padToBallMm": 3.4059,
      "previousPadToBallMm": 4.47438263897937
    },
    {
      "capacitor": "C_U1_N15",
      "target": "U1.N15",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 7.3520133296941195
    },
    {
      "capacitor": "C_U1_N9",
      "target": "U1.N9",
      "padToBallMm": 0.8246,
      "previousPadToBallMm": 8.527842634570598
    },
    {
      "capacitor": "C_DDR13",
      "target": "U3.D9",
      "padToBallMm": 1.2,
      "previousPadToBallMm": 6.60709656399004
    },
    {
      "capacitor": "C_U1_G14",
      "target": "U1.G14",
      "padToBallMm": 1.8439,
      "previousPadToBallMm": 15.738999332867387
    },
    {
      "capacitor": "C_DDR16",
      "target": "U3.N9",
      "padToBallMm": 0.2828,
      "previousPadToBallMm": null
    },
    {
      "capacitor": "C_U1_P13",
      "target": "U1.P13",
      "padToBallMm": 3.0594,
      "previousPadToBallMm": 4.0383288622894495
    },
    {
      "capacitor": "C_U1_N16",
      "target": "U1.N16",
      "padToBallMm": 3.4176,
      "previousPadToBallMm": 11.887644846646454
    },
    {
      "capacitor": "C_DDR10",
      "target": "U3.A8",
      "padToBallMm": 0.0,
      "previousPadToBallMm": 10.542205798666473
    },
    {
      "capacitor": "C_U1_K13",
      "target": "U1.K13",
      "padToBallMm": 3.7947,
      "previousPadToBallMm": 6.141343501221862
    },
    {
      "capacitor": "C_DDR4",
      "target": "U3.R1",
      "padToBallMm": 0.4472,
      "previousPadToBallMm": 7.666766714325473
    },
    {
      "capacitor": "C_U1_P14",
      "target": "U1.P14",
      "padToBallMm": 4.1843,
      "previousPadToBallMm": 4.065968519307547
    },
    {
      "capacitor": "C_U1_N13",
      "target": "U1.N13",
      "padToBallMm": 2.1633,
      "previousPadToBallMm": 3.0912942273423285
    },
    {
      "capacitor": "C_U1_H14",
      "target": "U1.H14",
      "padToBallMm": 2.6077,
      "previousPadToBallMm": 17.113389494778644
    },
    {
      "capacitor": "C_U1_F14",
      "target": "U1.F14",
      "padToBallMm": 4.2202,
      "previousPadToBallMm": 12.494002561229127
    },
    {
      "capacitor": "C_DDR1",
      "target": "U3.C1",
      "padToBallMm": 1.0,
      "previousPadToBallMm": 3.9909865270242393
    },
    {
      "capacitor": "C_U1_P8",
      "target": "U1.P8",
      "padToBallMm": 3.0265,
      "previousPadToBallMm": 3.3781799833638235
    },
    {
      "capacitor": "C_U1_E13",
      "target": "U1.E13",
      "padToBallMm": 1.5232,
      "previousPadToBallMm": 10.151063983642306
    },
    {
      "capacitor": "C_U1_R15",
      "target": "U1.R15",
      "padToBallMm": 2.0881,
      "previousPadToBallMm": 6.728157251432223
    },
    {
      "capacitor": "C_U1_K6",
      "target": "U1.K6",
      "padToBallMm": 2.4413,
      "previousPadToBallMm": 3.8992435163759662
    },
    {
      "capacitor": "C_U1_E10",
      "target": "U1.E10",
      "padToBallMm": 1.0198,
      "previousPadToBallMm": 14.238683225635718
    },
    {
      "capacitor": "C_U1_L8",
      "target": "U1.L8",
      "padToBallMm": 0.8485,
      "previousPadToBallMm": 6.701947478158868
    },
    {
      "capacitor": "C_U1_H11",
      "target": "U1.H11",
      "padToBallMm": 1.8111,
      "previousPadToBallMm": 13.261225433571365
    },
    {
      "capacitor": "C_U1_F11",
      "target": "U1.F11",
      "padToBallMm": 1.0,
      "previousPadToBallMm": 10.271713586349652
    },
    {
      "capacitor": "C_DDR12",
      "target": "U3.C9",
      "padToBallMm": 0.4472,
      "previousPadToBallMm": 7.637436335504801
    },
    {
      "capacitor": "C_U1_J12",
      "target": "U1.J12",
      "padToBallMm": 2.0591,
      "previousPadToBallMm": 8.648011332092484
    },
    {
      "capacitor": "C_U1_G7",
      "target": "U1.G7",
      "padToBallMm": 1.456,
      "previousPadToBallMm": 1.161077086157504
    },
    {
      "capacitor": "C_DDR2",
      "target": "U3.F1",
      "padToBallMm": 0.2,
      "previousPadToBallMm": 1.005889789601724
    },
    {
      "capacitor": "C_U1_F10",
      "target": "U1.F10",
      "padToBallMm": 2.0,
      "previousPadToBallMm": 15.663080795296947
    },
    {
      "capacitor": "C_U1_P7",
      "target": "U1.P7",
      "padToBallMm": 3.8053,
      "previousPadToBallMm": 3.6359455441466664
    },
    {
      "capacitor": "C_U1_G13",
      "target": "U1.G13",
      "padToBallMm": 1.4,
      "previousPadToBallMm": 6.94118865901223
    },
    {
      "capacitor": "C_U1_K14",
      "target": "U1.K14",
      "padToBallMm": 4.2048,
      "previousPadToBallMm": 12.669494859701393
    },
    {
      "capacitor": "C_U1_M11",
      "target": "U1.M11",
      "padToBallMm": 1.456,
      "previousPadToBallMm": 12.50936049524515
    },
    {
      "capacitor": "C_U1_P9",
      "target": "U1.P9",
      "padToBallMm": 2.0881,
      "previousPadToBallMm": 6.982556838293548
    },
    {
      "capacitor": "C_U1_R11",
      "target": "U1.R11",
      "padToBallMm": 3.2249,
      "previousPadToBallMm": 17.09468045913699
    },
    {
      "capacitor": "C_U1_K8",
      "target": "U1.K8",
      "padToBallMm": 0.4472,
      "previousPadToBallMm": 8.299644570703013
    },
    {
      "capacitor": "C_U1_P12",
      "target": "U1.P12",
      "padToBallMm": 2.0881,
      "previousPadToBallMm": 7.96518047504261
    },
    {
      "capacitor": "C_U1_N12",
      "target": "U1.N12",
      "padToBallMm": 1.0,
      "previousPadToBallMm": 6.429004588581344
    },
    {
      "capacitor": "C_U1_H13",
      "target": "U1.H13",
      "padToBallMm": 2.4083,
      "previousPadToBallMm": 6.290635897904122
    },
    {
      "capacitor": "C_U1_K12",
      "target": "U1.K12",
      "padToBallMm": 1.0,
      "previousPadToBallMm": 9.972968464805248
    },
    {
      "capacitor": "C_U1_P10",
      "target": "U1.P10",
      "padToBallMm": 3.1623,
      "previousPadToBallMm": 13.941739489748041
    },
    {
      "capacitor": "C_U1_R10",
      "target": "U1.R10",
      "padToBallMm": 4.219,
      "previousPadToBallMm": 12.34844524626481
    },
    {
      "capacitor": "C_U1_J14",
      "target": "U1.J14",
      "padToBallMm": 3.6497,
      "previousPadToBallMm": 14.045785844871762
    },
    {
      "capacitor": "C_U1_L14",
      "target": "U1.L14",
      "padToBallMm": 3.821,
      "previousPadToBallMm": 11.352008632836746
    },
    {
      "capacitor": "C_U1_H15",
      "target": "U1.H15",
      "padToBallMm": 3.1623,
      "previousPadToBallMm": 13.669385501916317
    },
    {
      "capacitor": "C_U1_J13",
      "target": "U1.J13",
      "padToBallMm": 3.1623,
      "previousPadToBallMm": 6.007004245045945
    }
  ]
}