seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

design/assembly-check.json

{
  "circuitSha256": "d75afa3436b49908533fa273a58e4d9a8bc65c04031373de97ce66584f0430b6",
  "populatedComponents": 184,
  "bareTestPads": [
    "TP_PB"
  ],
  "manufacturerLandPatterns": [
    {
      "reference": "L1",
      "padCentersMm": [
        -0.8,
        0.8
      ],
      "padSizeMm": [
        0.8,
        1.8
      ]
    },
    {
      "reference": "L2",
      "padCentersMm": [
        -0.8,
        0.8
      ],
      "padSizeMm": [
        0.8,
        1.8
      ]
    },
    {
      "reference": "L3",
      "padCentersMm": [
        -0.8,
        0.8
      ],
      "padSizeMm": [
        0.8,
        1.8
      ]
    },
    {
      "reference": "Y1",
      "padCentersMm": [
        -2.05,
        2.05
      ],
      "padSizeMm": [
        1.9,
        2.4
      ]
    },
    {
      "reference": "Y2",
      "padCentersMm": [
        -1.25,
        1.25
      ],
      "padSizeMm": [
        1.0,
        1.8
      ]
    }
  ],
  "emptyCopperKeepouts": [
    "pcb_keepout_0"
  ],
  "maximumHeaderBodyClearances": [
    {
      "reference": "J_BOOT0",
      "minimumGapMm": 0.3450000000000006,
      "nearestPart": "R_BOOT0"
    },
    {
      "reference": "J_BOOT1",
      "minimumGapMm": 0.3450000000000006,
      "nearestPart": "R_BOOT1"
    },
    {
      "reference": "J_BOOT2",
      "minimumGapMm": 0.3450000000000006,
      "nearestPart": "R_BOOT2"
    },
    {
      "reference": "J_BOOT3",
      "minimumGapMm": 0.3450000000000006,
      "nearestPart": "R_BOOT3"
    },
    {
      "reference": "J_BOOT4",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT0"
    },
    {
      "reference": "J_BOOT5",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT1"
    },
    {
      "reference": "J_BOOT6",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT2"
    },
    {
      "reference": "J_BOOT7",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT3"
    },
    {
      "reference": "J_BOOT8",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT4"
    },
    {
      "reference": "J_BOOT9",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT5"
    },
    {
      "reference": "J_BOOT10",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT6"
    },
    {
      "reference": "J_BOOT11",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT7"
    },
    {
      "reference": "J_BOOT12",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT8"
    },
    {
      "reference": "J_BOOT13",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT9"
    },
    {
      "reference": "J_BOOT14",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT10"
    },
    {
      "reference": "J_BOOT15",
      "minimumGapMm": 0.14499999999999957,
      "nearestPart": "R_BOOT11"
    }
  ],
  "smtComponents": 163,
  "manualHeaders": 21,
  "unresolvedRotations": 0,
  "scope": "Geometry, part assignment, and supplier-library rotation mapping. Electrical startup, DC-bias derating, SI/PI and actual assembler preview not qualified."
}