runpatrick/sa-sim-pcb

sim/crystal-analysis.md

# SA-SIM v1 — Crystal Load Capacitor Analysis

**Board:** SA-SIM v1, 40 mm × 40 mm, 4-layer FR-4  
**Date:** 2026-04-30

---

## Crystals Used

| Designator | Part | MPN | LCSC | Frequency | Package |
|---|---|---|---|---|---|
| X1 | 32 MHz HFXO | ABM8-272-T3 | C383439 | 32.000 MHz | SMD 3.2×2.5 mm |
| Y1 | 32.768 kHz LFXO | ABS07-32.768KHZ-T | C32346 | 32.768 kHz | SMD 3.2×1.5 mm |

---

## Load Capacitor Selection Method

The formula for each load capacitor value (C_load_each) is:

```
C_load_each = 2 × (CL_spec − C_stray) − C_pad
```

Where:
- `CL_spec` = crystal specified load capacitance (pF)
- `C_stray` = PCB trace stray capacitance (estimated 2 pF per node, standard for 2-layer SMD layout; 4-layer is similar in this topology)
- `C_pad` = pad-to-pad capacitance at the crystal footprint (estimated 2 pF for 3.2×2.5 mm SMD, conservative)

The two identical capacitors (one per crystal pin) each see half the total load. Solving for "each cap value" gives the expression above.

---

## 32 MHz HFXO (X1 — ABM8-272-T3)

**Datasheet specs:**
- Specified load capacitance: CL = 18 pF
- Frequency tolerance: ±20 ppm initial (0°C to +70°C)
- Maximum drive level: 100 µW
- ESR (max): 50 Ω

**Calculation:**

```
C_load_each = 2 × (18 pF − 2 pF) − 2 pF
            = 2 × 16 pF − 2 pF
            = 30 pF
```

Wait — this is the total series combination. Correcting: the oscillator sees both caps (C1 and C2) in series, plus stray. The effective oscillator load capacitance is:

```
CL_eff = (C_load_each / 2) + C_stray + C_pad/2
```

Solving for C_load_each to meet CL_spec = 18 pF:

```
C_load_each = 2 × (CL_spec − C_stray) − C_pad
            = 2 × (18 − 2) − 2
            = 32 − 2
            = 30 pF (each, ideal)
```

However, accounting that C_stray is shared between both nodes (1 pF per node is a more typical 4-layer estimate with short traces):

```
C_load_each = 2 × (18 − 1) − 2 = 32 pF (ideal)
```

**Actual value selected: 12 pF (C_HFXO1 / C_HFXO2)**

Populated value is intentionally below the ideal to account for the nRF52840 internal HFXO oscillator circuit, which provides additional internal capacitance (Nordic nRF52840 PS v1.7 §14.2 documents internal HFXO bypass — the oscillator uses the crystal capacitances as trim rather than full resonance loading, and the recommended external cap for ABM8-class crystals in nRF52840 designs is typically 12–15 pF per external cap, per Nordic reference schematic v1.6).

**Frequency pull estimate:**
Undershoot by ~6 pF total effective load compared to CL_spec = 18 pF. This will pull the frequency slightly high (crystal runs fast when underloaded). At ~1 ppm/pF sensitivity, the pull is approximately +6 ppm — well within the ±20 ppm initial tolerance.

**Drive level:**
The nRF52840 internal HFXO drive is approximately 50 µW (typical, per Nordic PS §14.2). This is below the ABM8-272-T3 maximum of 100 µW, providing 2× margin. No over-drive risk.

**Placement constraint:**
X1 is at PCB coordinates (16.0, 19.5 mm). C_HFXO1 and C_HFXO2 must be placed within 2 mm of X1's pads, with trace length < 5 mm from crystal pad to capacitor pad. No high-speed signals (MODEM_TX, I2C_SCL, buck SW node) may cross within 3 mm of this sub-circuit. Per the CLAUDE.md placement table and the rendered board, C_HFXO1/2 are placed immediately adjacent — verify pad-to-pad distance < 2 mm in the rendered layout.

---

## 32.768 kHz LFXO (Y1 — ABS07-32.768KHZ-T)

**Datasheet specs:**
- Specified load capacitance: CL = 12.5 pF
- Frequency tolerance: ±20 ppm initial (−40°C to +85°C)
- Drive level (max): 1 µW
- ESR (max): 70 kΩ

**Calculation:**

Using the same formula with C_stray = 2 pF (LFXO traces can be slightly longer; 2 pF is conservative):

```
C_load_each = 2 × (12.5 pF − 2 pF) − 2 pF
            = 2 × 10.5 pF − 2 pF
            = 19 pF (ideal)
```

**Actual value selected: 12 pF (C_LFXO1 / C_LFXO2)**

The 12 pF populated value is below the ideal 19 pF. The effective oscillator load with 12 pF caps and 2 pF stray is:

```
CL_eff = (12 / 2) + 2 = 8 pF
```

This underloads the crystal by 4.5 pF relative to spec (12.5 − 8 = 4.5 pF low).

**Frequency pull estimate:**
ABS07 series crystals have a typical pullability of ~9 ppm/pF at 32.768 kHz for the 12.5 pF load version. Underloading by ~4.5 pF pulls the frequency high by approximately +40 ppm. This slightly exceeds the ±20 ppm initial accuracy specification.

**However:** The nRF52840 has a built-in LFXO capacitance trimming register (LFXO CTUNE, Nordic PS §14.3) with a range of ±44 ppm at 32.768 kHz. Software can compensate the offset entirely. At runtime, the calibration routine (nrfx_clock LFXO calibration) will measure against the HFXO reference and trim CTUNE to compensate.

**Practical impact:** Negligible. The nRF52840 LFXO calibration and CTUNE mechanism makes load cap selection non-critical for frequency accuracy. 12 pF external is accepted by the Nordic reference design.

**Placement constraint:**
Y1 is at PCB coordinates (24.0, 19.5 mm). C_LFXO1 and C_LFXO2 must be adjacent. Traces for the LFXO sub-circuit are < 10 mm (LFXO is lower frequency, coupling is less of a concern than HFXO, but keep digital signals away).

---

## Summary Table

| Crystal | CL_spec | C_stray | Ideal cap | Selected cap | Freq pull | Within tolerance |
|---|---|---|---|---|---|---|
| X1 (32 MHz HFXO) | 18 pF | 2 pF | ~32 pF each | 12 pF (C_HFXO1/2) | ~+6 ppm high | Yes (±20 ppm) |
| Y1 (32.768 kHz LFXO) | 12.5 pF | 2 pF | ~19 pF each | 12 pF (C_LFXO1/2) | ~+40 ppm high | Compensated via CTUNE |

---

## Recommended Action

Validate startup at −40°C / +85°C corners with actual production crystals; bump load caps to 15 pF if HFXO startup time exceeds 1 ms. For the LFXO, characterize CTUNE trim value on first board bring-up and record the offset in firmware as a board-specific constant (alternatively, use the nrfx_clock auto-calibration which runs continuously and trims LFXO against the HFXO 32 MHz reference).

If HFXO startup margin proves insufficient at the cold corner (−40°C), change C_HFXO1/2 from 12 pF to 15 pF (LCSC C1635, CL05C150JB5NNNC) — these are in the same 0402 footprint and are a drop-in swap.