runpatrick/sa-sim-pcb
This code defines PCB footprints for various electronic modules, including BG95 cellular modem, BNO086 sensor, BQ25180 battery charger, and BQ27220 power management IC, detailing their physical pad layouts and key external features.
- Version
- 1.0.6
- License
- unset
- Stars
- 0
overlap-pairs.json
[
{
"type": "pcb_component_outside_board_error",
"msg": "Component U7 extends outside board boundaries by 0.25mm. Try moving it 0.25mm left to fit within the board edge."
},
{
"type": "pcb_footprint_overlap_error",
"a": "J1",
"b": "R_CC2",
"msg": "pcb_smtpad J1.CC1 overlaps with pcb_smtpad R_CC2.pin1"
},
{
"type": "pcb_footprint_overlap_error",
"a": "J1",
"b": "R_CC2",
"msg": "pcb_smtpad J1.CC1 overlaps with pcb_smtpad R_CC2.pin2"
},
{
"type": "pcb_footprint_overlap_error",
"a": "J1",
"b": "R_CC2",
"msg": "pcb_smtpad J1.DP overlaps with pcb_smtpad R_CC2.pin1"
},
{
"type": "pcb_footprint_overlap_error",
"a": "J1",
"b": "R_CC2",
"msg": "pcb_smtpad J1.DP overlaps with pcb_smtpad R_CC2.pin2"
},
{
"type": "pcb_footprint_overlap_error",
"a": "J1",
"b": "U6",
"msg": "pcb_smtpad J1.pin8 overlaps with pcb_smtpad U6.VBUS"
},
{
"type": "pcb_footprint_overlap_error",
"a": "J1",
"b": "U6",
"msg": "pcb_smtpad J1.pin8 overlaps with pcb_smtpad U6.GND"
},
{
"type": "pcb_footprint_overlap_error",
"a": "D1",
"b": "U6",
"msg": "pcb_smtpad D1.DP_HOST overlaps with pcb_smtpad U6.GND"
},
{
"type": "pcb_footprint_overlap_error",
"a": "Q1",
"b": "C_BAT",
"msg": "pcb_smtpad Q1.DRAIN overlaps with pcb_smtpad C_BAT.pin2"
},
{
"type": "pcb_footprint_overlap_error",
"a": "L1",
"b": "R_FB_TOP",
"msg": "pcb_smtpad L1.pin2 overlaps with pcb_smtpad R_FB_TOP.pin2"
},
{
"type": "pcb_footprint_overlap_error",
"a": "L1",
"b": "C_IMU_VDD",
"msg": "pcb_smtpad L1.pin1 overlaps with pcb_smtpad C_IMU_VDD.pin2"
},
{
"type": "pcb_footprint_overlap_error",
"a": "C21",
"b": "IC1",
"msg": "pcb_smtpad C21.pin1 overlaps with pcb_smtpad IC1.USBD_DM"
},
{
"type": "pcb_footprint_overlap_error",
"a": "C21",
"b": "IC1",
"msg": "pcb_smtpad C21.pin1 overlaps with pcb_smtpad IC1.USBD_DP"
},
{
"type": "pcb_footprint_overlap_error",
"a": "C21",
"b": "C_BG95_UART",
"msg": "pcb_smtpad C21.pin2 overlaps with pcb_smtpad C_BG95_UART.pin1"
},
{
"type": "pcb_footprint_overlap_error",
"a": "C_MCU_DEC3",
"b": "X1",
"msg": "pcb_smtpad C_MCU_DEC3.pin1 overlaps with pcb_smtpad X1.GND"
},
{
"type": "pcb_footprint_overlap_error",
"a": "C_MCU_DCCH",
"b": "Y1",
"msg": "pcb_smtpad C_MCU_DCCH.pin1 overlaps with pcb_smtpad Y1.XOUT"
},
{
"type": "pcb_footprint_overlap_error",
"a": "C_MCU_DCCH",
"b": "Y1",
"msg": "pcb_smtpad C_MCU_DCCH.pin2 overlaps with pcb_smtpad Y1.XOUT"
},
{
"type": "pcb_footprint_overlap_error",
"a": "X1",
"b": "C_HFXO2",
"msg": "pcb_smtpad X1.XIN overlaps with pcb_smtpad C_HFXO2.pin2"
},
{
"type": "pcb_footprint_overlap_error",
"a": "Y1",
"b": "C_LFXO2",
"msg": "pcb_smtpad Y1.XIN overlaps with pcb_smtpad C_LFXO2.pin2"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "J1",
"b": "R_CC2",
"msg": "Pads pcb_port[.J1 > .CC1] and pcb_port[.R_CC2 > .pin1] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "J1",
"b": "R_CC2",
"msg": "Pads pcb_port[.J1 > .CC1] and pcb_port[.R_CC2 > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "J1",
"b": "R_CC2",
"msg": "Pads pcb_port[.J1 > .DP] and pcb_port[.R_CC2 > .pin1] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "J1",
"b": "R_CC2",
"msg": "Pads pcb_port[.J1 > .DP] and pcb_port[.R_CC2 > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "J1",
"b": "U6",
"msg": "Pads pcb_port[.J1 > .pin8] and pcb_port[.U6 > .VBUS] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "J1",
"b": "U6",
"msg": "Pads pcb_port[.J1 > .pin8] and pcb_port[.U6 > .GND] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "D1",
"b": "U6",
"msg": "Pads pcb_port[.D1 > .DP_HOST] and pcb_port[.U6 > .GND] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "U6",
"b": "C_VBUS",
"msg": "Pads pcb_port[.U6 > .GND] and pcb_port[.C_VBUS > .pin1] are too close (clearance: 0.07mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "Q1",
"b": "C_BAT",
"msg": "Pads pcb_port[.Q1 > .DRAIN] and pcb_port[.C_BAT > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "L1",
"b": "C_IMU_VDD",
"msg": "Pads pcb_port[.L1 > .pin1] and pcb_port[.C_IMU_VDD > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "L1",
"b": "R_FB_TOP",
"msg": "Pads pcb_port[.L1 > .pin2] and pcb_port[.R_FB_TOP > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C21",
"b": "IC1",
"msg": "Pads pcb_port[.C21 > .pin1] and pcb_port[.IC1 > .USBD_DM] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C21",
"b": "IC1",
"msg": "Pads pcb_port[.C21 > .pin1] and pcb_port[.IC1 > .USBD_DP] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C21",
"b": "IC1",
"msg": "Pads pcb_port[.C21 > .pin1] and pcb_port[.IC1 > .VBUS_DETECT] are too close (clearance: 0.025mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C21",
"b": "C_BG95_UART",
"msg": "Pads pcb_port[.C21 > .pin2] and pcb_port[.C_BG95_UART > .pin1] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "IC1",
"b": "C_MCU_DEC3",
"msg": "Pads pcb_port[.IC1 > .VDD] and pcb_port[.C_MCU_DEC3 > .pin2] are too close (clearance: 0.085mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "IC1",
"b": "C_MCU_AVDD",
"msg": "Pads pcb_port[.IC1 > .NC20] and pcb_port[.C_MCU_AVDD > .pin1] are too close (clearance: 0.085mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "IC1",
"b": "IC1",
"msg": "Pads pcb_port[.IC1 > .DCCH] and pcb_port[.IC1 > .MODEM_RX] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "IC1",
"b": "R_SCL",
"msg": "Pads pcb_port[.IC1 > .SCL] and pcb_port[.R_SCL > .pin1] are too close (clearance: 0.085mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "IC1",
"b": "C_MCU_DCCH",
"msg": "Pads pcb_port[.IC1 > .NC56] and pcb_port[.C_MCU_DCCH > .pin2] are too close (clearance: 0.085mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C_MCU_AVDD",
"b": "C_BG95_UART",
"msg": "Pads pcb_port[.C_MCU_AVDD > .pin2] and pcb_port[.C_BG95_UART > .pin1] are too close (clearance: 0.09mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C_MCU_DEC3",
"b": "X1",
"msg": "Pads pcb_port[.C_MCU_DEC3 > .pin1] and pcb_port[.X1 > .GND] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C_MCU_DCCH",
"b": "Y1",
"msg": "Pads pcb_port[.C_MCU_DCCH > .pin1] and pcb_port[.Y1 > .XOUT] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "C_MCU_DCCH",
"b": "Y1",
"msg": "Pads pcb_port[.C_MCU_DCCH > .pin2] and pcb_port[.Y1 > .XOUT] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "X1",
"b": "C_HFXO2",
"msg": "Pads pcb_port[.X1 > .XIN] and pcb_port[.C_HFXO2 > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_pad_pad_clearance_error",
"a": "Y1",
"b": "C_LFXO2",
"msg": "Pads pcb_port[.Y1 > .XIN] and pcb_port[.C_LFXO2 > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "R_CC1",
"b": "D1",
"msg": "Courtyard of R_CC1 overlaps with courtyard of D1"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "D1",
"b": "U6",
"msg": "Courtyard of D1 overlaps with courtyard of U6"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "D1",
"b": "C_VBUS",
"msg": "Courtyard of D1 overlaps with courtyard of C_VBUS"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "U6",
"b": "C_VBUS",
"msg": "Courtyard of U6 overlaps with courtyard of C_VBUS"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "Q1",
"b": "R_NTC_PU",
"msg": "Courtyard of Q1 overlaps with courtyard of R_NTC_PU"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "Q1",
"b": "C_BAT",
"msg": "Courtyard of Q1 overlaps with courtyard of C_BAT"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "L1",
"b": "R_FB_TOP",
"msg": "Courtyard of L1 overlaps with courtyard of R_FB_TOP"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "L1",
"b": "C_IMU_VDD",
"msg": "Courtyard of L1 overlaps with courtyard of C_IMU_VDD"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "C21",
"b": "C_MCU_AVDD",
"msg": "Courtyard of C21 overlaps with courtyard of C_MCU_AVDD"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "C21",
"b": "C_MCU_DEC1",
"msg": "Courtyard of C21 overlaps with courtyard of C_MCU_DEC1"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "C21",
"b": "C_BG95_UART",
"msg": "Courtyard of C21 overlaps with courtyard of C_BG95_UART"
},
{
"type": "pcb_courtyard_overlap_error",
"a": "C_MCU_AVDD",
"b": "C_BG95_UART",
"msg": "Courtyard of C_MCU_AVDD overlaps with courtyard of C_BG95_UART"
}
]Related Packages
Similar packagemohan-bee/speakerThis code defines configurable 3D models and PCB footprints for various electronic components, including a battery charger IC, a dual Hall sensor, a dual power switch, and a voltage regulator, with detailed pinouts, footprints, and CAD models for schematic and physical design.
Discover something newShiboSoftwareDev/muse-sensecap-watcher-replacementA 4-layer ESP32-S3 carrier board with USB-C power, AMS1117 3.3V regulation, reset/boot/user buttons, status LED, capacitors/resistors, and a 24-pin FFC interface.