runpatrick/sa-sim-pcb
This code defines PCB footprints for various electronic modules, including BG95 cellular modem, BNO086 sensor, BQ25180 battery charger, and BQ27220 power management IC, detailing their physical pad layouts and key external features.
- Version
- 1.0.6
- License
- unset
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- 0
dist/index.js
import { jsxs, jsx } from 'react/jsx-runtime';
// nRF52840 QFN73 7×7mm 0.5mm pitch — 72 perimeter pads + 1 center thermal EP
// Pin 1 = bottom-left corner, CCW numbering (IPC convention)
// Side distribution: 20-bottom, 16-right, 20-top, 16-left = 72 + EP(73)
// Pad lengths: 0.4mm (perpendicular to edge) × 0.25mm (along edge)
const nrf52840Footprint = () => (jsxs("footprint", { children: [Array.from({ length: 20 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 1)], shape: "rect", width: "0.25mm", height: "0.4mm", pcbX: `${ -4.75 + i * 0.5}mm`, pcbY: "3.7mm", layer: "top" }))), Array.from({ length: 16 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 21)], shape: "rect", width: "0.4mm", height: "0.25mm", pcbX: "3.7mm", pcbY: `${3.25 - i * 0.5}mm`, layer: "top" }))), Array.from({ length: 20 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 37)], shape: "rect", width: "0.25mm", height: "0.4mm", pcbX: `${4.75 - i * 0.5}mm`, pcbY: "-3.7mm", layer: "top" }))), Array.from({ length: 16 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 57)], shape: "rect", width: "0.4mm", height: "0.25mm", pcbX: "-3.7mm", pcbY: `${ -4.25 + i * 0.5}mm`, layer: "top" }))), jsx("smtpad", { portHints: ["73"], shape: "rect", width: "5.4mm", height: "5.4mm", pcbX: "0mm", pcbY: "0mm", layer: "top" }), jsx("silkscreenpath", { route: [
{ x: -3.5, y: 4.0 },
{ x: 3.5, y: 4.0 },
{ x: 3.5, y: -4 },
{ x: -3.5, y: -4 },
{ x: -3.5, y: 4.0 },
] })] }));
// BG95-M3 LGA96 23.6×19.9mm — simplified perimeter-only footprint
// 96 pads total; this footprint covers ~42 perimeter pads with placeholders.
// ⚠️ Inner-grid pads must be added per Quectel BG95 HW Design Guide §3 before fab.
// We define 42 pads on the perimeter at 2.0mm pitch with 1.2×1.2mm pad size.
// Pin numbering follows the Quectel datasheet (south edge pin 1 → CCW).
const bg95Footprint = () => (jsxs("footprint", { children: [[-11, -9, -7, -5, -3, -1, 1, 3, 5, 7, 9, 11].map((x, i) => (jsx("smtpad", { portHints: [String(i + 1)], shape: "rect", width: "1.2mm", height: "1.2mm", pcbX: `${x}mm`, pcbY: "9.95mm", layer: "top" }))), [7.95, 5.95, 3.95, 1.95, -0.05, -2.05, -4.05, -6.05, -8.05].map((y, i) => (jsx("smtpad", { portHints: [String(i + 13)], shape: "rect", width: "1.2mm", height: "1.2mm", pcbX: "11.8mm", pcbY: `${y}mm`, layer: "top" }))), [11, 9, 7, 5, 3, 1, -1, -3, -5, -7, -9, -11].map((x, i) => (jsx("smtpad", { portHints: [String(i + 22)], shape: "rect", width: "1.2mm", height: "1.2mm", pcbX: `${x}mm`, pcbY: "-9.95mm", layer: "top" }))), [-8.05, -6.05, -4.05, -2.05, -0.05, 1.95, 3.95, 5.95, 7.95].map((y, i) => (jsx("smtpad", { portHints: [String(i + 34)], shape: "rect", width: "1.2mm", height: "1.2mm", pcbX: "-11.8mm", pcbY: `${y}mm`, layer: "top" }))), jsx("smtpad", { portHints: ["50"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "-9mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["51"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "-7mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["52"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "-5mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["53"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "-3mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["54"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "-1mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["55"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "1mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["56"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "3mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["57"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "5mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["58"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "7mm", pcbY: "7.5mm", layer: "top" }), jsx("smtpad", { portHints: ["59"], shape: "rect", width: "1.0mm", height: "1.0mm", pcbX: "9mm", pcbY: "7.5mm", layer: "top" }), jsx("silkscreenpath", { route: [
{ x: -11.8, y: -9.95 },
{ x: 11.8, y: -9.95 },
{ x: 11.8, y: 9.95 },
{ x: -11.8, y: 9.95 },
{ x: -11.8, y: -9.95 },
] })] }));
// BNO086 LGA28 3.2×3.8mm body — 4-row × 7-col pad grid, 0.5mm pitch
// 28 pads, 0.35×0.35mm each
// Numbering: row A (top, y=+0.75) = 1..7 L→R, row D (bottom, y=-0.75) = 22..28
const bno086Footprint = () => (jsxs("footprint", { children: [[0.75, 0.25, -0.25, -0.75].map((y, rowIdx) => [-1.5, -1, -0.5, 0.0, 0.5, 1.0, 1.5].map((x, colIdx) => {
const pinNumber = rowIdx * 7 + colIdx + 1;
return (jsx("smtpad", { portHints: [String(pinNumber)], shape: "rect", width: "0.35mm", height: "0.35mm", pcbX: `${x}mm`, pcbY: `${y}mm`, layer: "top" }));
})), jsx("silkscreenpath", { route: [
{ x: -1.7, y: -1 },
{ x: 1.7, y: -1 },
{ x: 1.7, y: 1.0 },
{ x: -1.7, y: 1.0 },
{ x: -1.7, y: -1 },
] })] }));
// BQ25180 WCSP9 / DSBGA-9, 1.4×1.4mm body, 0.4mm ball pitch
// 3×3 array. Pin 1 = A1 = top-left (x=-0.4, y=+0.4)
// Per TI SLUSDP3 ball assignment:
// A1=IN A2=PMID A3=BAT
// B1=GND B2=SYS B3=SCL
// C1=TS C2=INT C3=SDA
const bq25180Footprint = () => (jsxs("footprint", { children: [jsx("smtpad", { portHints: ["1", "A1"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "-0.4mm", pcbY: "0.4mm", layer: "top" }), jsx("smtpad", { portHints: ["2", "A2"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "0mm", pcbY: "0.4mm", layer: "top" }), jsx("smtpad", { portHints: ["3", "A3"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "0.4mm", pcbY: "0.4mm", layer: "top" }), jsx("smtpad", { portHints: ["4", "B1"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "-0.4mm", pcbY: "0mm", layer: "top" }), jsx("smtpad", { portHints: ["5", "B2"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "0mm", pcbY: "0mm", layer: "top" }), jsx("smtpad", { portHints: ["6", "B3"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "0.4mm", pcbY: "0mm", layer: "top" }), jsx("smtpad", { portHints: ["7", "C1"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "-0.4mm", pcbY: "-0.4mm", layer: "top" }), jsx("smtpad", { portHints: ["8", "C2"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "0mm", pcbY: "-0.4mm", layer: "top" }), jsx("smtpad", { portHints: ["9", "C3"], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: "0.4mm", pcbY: "-0.4mm", layer: "top" }), jsx("silkscreenpath", { route: [
{ x: -0.7, y: -0.7 },
{ x: 0.7, y: -0.7 },
{ x: 0.7, y: 0.7 },
{ x: -0.7, y: 0.7 },
{ x: -0.7, y: -0.7 },
] })] }));
// BQ51013B QFN28 (RHL) 4.0×4.0mm 0.4mm pitch — 7 pads/side + center EP
// Pad: 0.2mm × 0.45mm. Center EP: 2.7×2.7mm (GND, pin 29)
// Pin 1 = bottom-left, CCW
const bq51013Footprint = () => (jsxs("footprint", { children: [Array.from({ length: 7 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 1)], shape: "rect", width: "0.2mm", height: "0.45mm", pcbX: `${ -1.2 + i * 0.4}mm`, pcbY: "2.225mm", layer: "top" }))), Array.from({ length: 7 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 8)], shape: "rect", width: "0.45mm", height: "0.2mm", pcbX: "2.225mm", pcbY: `${1.2 - i * 0.4}mm`, layer: "top" }))), Array.from({ length: 7 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 15)], shape: "rect", width: "0.2mm", height: "0.45mm", pcbX: `${1.2 - i * 0.4}mm`, pcbY: "-2.225mm", layer: "top" }))), Array.from({ length: 7 }, (_, i) => (jsx("smtpad", { portHints: [String(i + 22)], shape: "rect", width: "0.45mm", height: "0.2mm", pcbX: "-2.225mm", pcbY: `${ -1.2 + i * 0.4}mm`, layer: "top" }))), jsx("smtpad", { portHints: ["29"], shape: "rect", width: "2.7mm", height: "2.7mm", pcbX: "0mm", pcbY: "0mm", layer: "top" }), jsx("silkscreenpath", { route: [
{ x: -2, y: -2.5 },
{ x: 2.0, y: -2.5 },
{ x: 2.0, y: 2.5 },
{ x: -2, y: 2.5 },
{ x: -2, y: -2.5 },
] })] }));
// BQ27220 DSBGA-12 (YZF) 1.62×2.16mm — 3 cols × 4 rows, 0.4mm pitch
// Pin 1 = A1 = top-left. Pads 0.22×0.22mm.
// TI SLUSCY9 ball map:
// A1=GPOUT A2=BAT A3=BIN
// B1=SDA B2=SCL B3=SE
// C1=VSS C2=SRP C3=SRN
// D1=REGIN D2=BAT2 D3=VCC
const bq27220Footprint = () => (jsxs("footprint", { children: [[0.6, 0.2, -0.2, -0.6].map((y, rowIdx) => [-0.4, 0.0, 0.4].map((x, colIdx) => {
const pinNumber = rowIdx * 3 + colIdx + 1;
const ballName = `${"ABCD"[rowIdx]}${colIdx + 1}`;
return (jsx("smtpad", { portHints: [String(pinNumber), ballName], shape: "rect", width: "0.22mm", height: "0.22mm", pcbX: `${x}mm`, pcbY: `${y}mm`, layer: "top" }));
})), jsx("silkscreenpath", { route: [
{ x: -0.81, y: -1.08 },
{ x: 0.81, y: -1.08 },
{ x: 0.81, y: 1.08 },
{ x: -0.81, y: 1.08 },
{ x: -0.81, y: -1.08 },
] })] }));
// TPS62840 X2SON-8 (DSG) 1.5×2.0mm body, 0.5mm pitch
// 4 pads each side (left/right only), 0.26×0.35mm pads
// Pin map (TI SLVSEC6D):
// 1=VIN 2=EN 3=MODE 4=AGND
// 5=PGND 6=SW 7=FB 8=VOS
const tps62840Footprint = () => (jsxs("footprint", { children: [[0, 1, 2, 3].map((i) => (jsx("smtpad", { portHints: [String(i + 1)], shape: "rect", width: "0.35mm", height: "0.26mm", pcbX: "-0.85mm", pcbY: `${0.75 - i * 0.5}mm`, layer: "top" }))), [0, 1, 2, 3].map((i) => (jsx("smtpad", { portHints: [String(i + 5)], shape: "rect", width: "0.35mm", height: "0.26mm", pcbX: "0.85mm", pcbY: `${ -0.75 + i * 0.5}mm`, layer: "top" }))), jsx("silkscreenpath", { route: [
{ x: -0.75, y: -1 },
{ x: 0.75, y: -1 },
{ x: 0.75, y: 1.0 },
{ x: -0.75, y: 1.0 },
{ x: -0.75, y: -1 },
] })] }));
// TPS7A02 X2SON-6 (DQN) 1.0×1.0mm, 0.35mm pitch
// 3 pads each side. Pin map (TI SLVSDQ9):
// 1=IN 2=GND 3=NR/SS
// 4=NC 5=EN 6=OUT
const tps7a02Footprint = () => (jsxs("footprint", { children: [[0, 1, 2].map((i) => (jsx("smtpad", { portHints: [String(i + 1)], shape: "rect", width: "0.25mm", height: "0.18mm", pcbX: "-0.575mm", pcbY: `${0.35 - i * 0.35}mm`, layer: "top" }))), [0, 1, 2].map((i) => (jsx("smtpad", { portHints: [String(i + 4)], shape: "rect", width: "0.25mm", height: "0.18mm", pcbX: "0.575mm", pcbY: `${ -0.35 + i * 0.35}mm`, layer: "top" }))), jsx("silkscreenpath", { route: [
{ x: -0.5, y: -0.5 },
{ x: 0.5, y: -0.5 },
{ x: 0.5, y: 0.5 },
{ x: -0.5, y: 0.5 },
{ x: -0.5, y: -0.5 },
] })] }));
// USB-C 6-pin SMD power-only receptacle (e.g. GCT USB4085-GF-A)
// Body ~7.3×8.94mm, mid-mount. Pin map for power-only USB-C 6-pin:
// 1=GND 2=VBUS 3=CC1 4=D+ 5=D- 6=VBUS (paired)
// Some 6-pin power-only variants use:
// 1=VBUS 2=GND 3=CC 4=D+ 5=D- 6=SBU (varies by vendor)
// Per GCT USB4085 datasheet pin assignment we use pin labels via pinLabels in the chip.
const usbcFootprint = () => (jsxs("footprint", { children: [[-1.25, -0.75, -0.25, 0.25, 0.75, 1.25].map((x, i) => (jsx("smtpad", { portHints: [String(i + 1)], shape: "rect", width: "0.3mm", height: "1.4mm", pcbX: `${x}mm`, pcbY: "2.0mm", layer: "top" }))), jsx("smtpad", { portHints: ["S1"], shape: "rect", width: "2.0mm", height: "1.8mm", pcbX: "-3.0mm", pcbY: "0.0mm", layer: "top" }), jsx("smtpad", { portHints: ["S2"], shape: "rect", width: "2.0mm", height: "1.8mm", pcbX: "3.0mm", pcbY: "0.0mm", layer: "top" }), jsx("silkscreenpath", { route: [
{ x: -3.65, y: 2.8 },
{ x: 3.65, y: 2.8 },
{ x: 3.65, y: -2.5 },
{ x: -3.65, y: -2.5 },
{ x: -3.65, y: 2.8 },
] })] }));
// JST PH 2-pin top-entry connector (S2B-PH-K-S, through-hole)
// 2.0mm pitch between pins; 0.95mm hole / 1.55mm pad
// Pin 1 = positive (BAT_P), pin 2 = negative (GND) per JST polarity convention
const jstph2Footprint = () => (jsxs("footprint", { insertionDirection: "from_above", children: [jsx("platedhole", { portHints: ["1"], pcbX: "-1.0mm", pcbY: "0mm", outerDiameter: "1.55mm", holeDiameter: "0.95mm", shape: "circle" }), jsx("platedhole", { portHints: ["2"], pcbX: "1.0mm", pcbY: "0mm", outerDiameter: "1.55mm", holeDiameter: "0.95mm", shape: "circle" }), jsx("silkscreenpath", { route: [
{ x: -2.5, y: -2 },
{ x: 2.5, y: -2 },
{ x: 2.5, y: 2.0 },
{ x: -2.5, y: 2.0 },
{ x: -2.5, y: -2 },
] })] }));
// MFF2 eSIM footprint (Murata SC20-FP, NXP SLM97, similar 6-contact 5x6mm SMD)
// Body 6.0×5.0mm. 6 contact pads on bottom, 1.0mm pitch.
// Pin map per ETSI TS 102 671 MFF2:
// 1=VCC 2=RST 3=CLK 4=GND
// 5=VPP 6=I/O
const esimFootprint = () => (jsxs("footprint", { children: [[-2, -1, 0.0].map((x, i) => (jsx("smtpad", { portHints: [String(i + 1)], shape: "rect", width: "0.6mm", height: "0.8mm", pcbX: `${x}mm`, pcbY: "1.5mm", layer: "top" }))), [-2, -1, 0.0].map((x, i) => (jsx("smtpad", { portHints: [String(i + 4)], shape: "rect", width: "0.6mm", height: "0.8mm", pcbX: `${x}mm`, pcbY: "-1.5mm", layer: "top" }))), jsx("silkscreenpath", { route: [
{ x: -3, y: -2.5 },
{ x: 3.0, y: -2.5 },
{ x: 3.0, y: 2.5 },
{ x: -3, y: 2.5 },
{ x: -3, y: -2.5 },
] })] }));
// Crystal footprints — built inline because the registry strings
// `crystal_4pad_2x1.6mm` / `crystal_2pad_1.6x1mm` referenced earlier
// aren't valid tscircuit footprinter names.
//
// HFXO (X1): Abracon ABM8-272-T3, 3.2×2.5mm 4-SMD pkg
// 4 pads at corners on a 2.2mm × 1.65mm centerline:
// pin1 = XIN (bottom-left)
// pin2 = GND (bottom-right) — shell
// pin3 = XOUT (top-right)
// pin4 = GND (top-left) — shell
// Pad size: 1.0×1.2mm (industry-standard reflow land for 3225 case).
//
// LFXO (Y1): Abracon ABS07-32.768KHZ-T, 3.2×1.5mm 2-SMD pkg
// 2 pads on ±1.1mm centers, pad size 1.0×1.2mm:
// pin1 = XIN (left)
// pin2 = XOUT (right)
const crystalHfxoFootprint = () => (jsxs("footprint", { children: [jsx("smtpad", { portHints: ["1"], shape: "rect", width: "1.0mm", height: "1.2mm", pcbX: "-1.1mm", pcbY: "-0.825mm", layer: "top" }), jsx("smtpad", { portHints: ["2"], shape: "rect", width: "1.0mm", height: "1.2mm", pcbX: "1.1mm", pcbY: "-0.825mm", layer: "top" }), jsx("smtpad", { portHints: ["3"], shape: "rect", width: "1.0mm", height: "1.2mm", pcbX: "1.1mm", pcbY: "0.825mm", layer: "top" }), jsx("smtpad", { portHints: ["4"], shape: "rect", width: "1.0mm", height: "1.2mm", pcbX: "-1.1mm", pcbY: "0.825mm", layer: "top" }), jsx("silkscreenpath", { route: [
{ x: -1.6, y: 1.25 },
{ x: 1.6, y: 1.25 },
{ x: 1.6, y: -1.25 },
{ x: -1.6, y: -1.25 },
{ x: -1.6, y: 1.25 },
] })] }));
const crystalLfxoFootprint = () => (jsxs("footprint", { children: [jsx("smtpad", { portHints: ["1"], shape: "rect", width: "1.0mm", height: "1.2mm", pcbX: "-1.1mm", pcbY: "0mm", layer: "top" }), jsx("smtpad", { portHints: ["2"], shape: "rect", width: "1.0mm", height: "1.2mm", pcbX: "1.1mm", pcbY: "0mm", layer: "top" }), jsx("silkscreenpath", { route: [
{ x: -1.6, y: 0.75 },
{ x: 1.6, y: 0.75 },
{ x: 1.6, y: -0.75 },
{ x: -1.6, y: -0.75 },
{ x: -1.6, y: 0.75 },
] })] }));
var index_circuit = () => (jsx("board", { width: "50mm", height: "50mm", children: jsxs("group", { pcbX: -25, pcbY: -25, children: [jsx("chip", { name: "J1", pcbX: 4, pcbY: 28, pcbRotation: 90, pinLabels: {
pin1: "GND",
pin2: "VBUS",
pin3: "CC1",
pin4: "DP",
pin5: "DM",
pin6: "CC2",
}, footprint: usbcFootprint(), connections: {
GND: "net.GND",
VBUS: "net.VBUS",
CC1: "net.USB_CC1",
DP: "net.USB_DP_RAW",
DM: "net.USB_DM_RAW",
CC2: "net.USB_CC2",
} }), jsx("resistor", { name: "R_CC1", resistance: "5.1k", footprint: "0402", pcbX: 12.5, pcbY: 28, connections: { pin1: "net.USB_CC1", pin2: "net.GND" } }), jsx("resistor", { name: "R_CC2", resistance: "5.1k", footprint: "0402", pcbX: 12.5, pcbY: 30, connections: { pin1: "net.USB_CC2", pin2: "net.GND" } }), jsx("chip", { name: "D1", footprint: "sot23-6", pcbX: 9, pcbY: 30, pinLabels: {
pin1: "DP_HOST",
pin2: "GND",
pin3: "DM_HOST",
pin4: "DM_USB",
pin5: "VBUS_REF",
pin6: "DP_USB",
}, connections: {
DP_HOST: "net.USB_DP",
GND: "net.GND",
DM_HOST: "net.USB_DM",
DM_USB: "net.USB_DM_RAW",
VBUS_REF: "net.VBUS",
DP_USB: "net.USB_DP_RAW",
} }), jsx("chip", { name: "U6", footprint: "sma", pcbX: 4, pcbY: 36, pinLabels: { pin1: "VBUS", pin2: "GND" }, connections: { VBUS: "net.VBUS", GND: "net.GND" } }), jsx("capacitor", { name: "C_VBUS", capacitance: "4.7uF", footprint: "0402", pcbX: 8.1, pcbY: 33.5, connections: { pin1: "net.VBUS", pin2: "net.GND" } }), jsx("chip", { name: "J2", pcbX: 47, pcbY: 30, pcbRotation: 270, pinLabels: { pin1: "BATPOS", pin2: "GND" }, footprint: jstph2Footprint(), connections: { BATPOS: "net.BAT_P_RAW", GND: "net.GND" } }), jsx("chip", { name: "U7", footprint: "sma", pcbX: 46.5, pcbY: 26, pinLabels: { pin1: "BATPOS", pin2: "GND" }, connections: { BATPOS: "net.BAT_P_RAW", GND: "net.GND" } }), jsx("chip", { name: "Q1", footprint: "sot23", pcbX: 47, pcbY: 37, pinLabels: { pin1: "GATE", pin2: "SOURCE", pin3: "DRAIN" }, connections: {
GATE: "net.GND",
SOURCE: "net.BAT_P_RAW",
DRAIN: "net.BAT_P",
} }), jsx("resistor", { name: "R8", resistance: "10k", footprint: "0402", pcbX: 43, pcbY: 34, connections: { pin1: "net.NTC_TS", pin2: "net.GND" } }), jsx("resistor", { name: "R_NTC_PU", resistance: "10k", footprint: "0402", pcbX: 46.1, pcbY: 34, connections: { pin1: "net._3V3", pin2: "net.NTC_TS" } }), jsx("capacitor", { name: "C_BAT", capacitance: "4.7uF", footprint: "0402", pcbX: 48, pcbY: 34, connections: { pin1: "net.BAT_P", pin2: "net.GND" } }), jsx("chip", { name: "U3", pcbX: 24, pcbY: 15, pinLabels: {
pin1: "IN",
pin2: "PMID",
pin3: "BAT",
pin4: "GND",
pin5: "SYS",
pin6: "SCL",
pin7: "TS",
pin8: "INT",
pin9: "SDA",
}, footprint: bq25180Footprint(), connections: {
IN: "net.VBUS",
PMID: "net.PMID",
BAT: "net.BAT_P",
GND: "net.GND",
SYS: "net.VSYS",
SCL: "net.I2C_SCL",
TS: "net.NTC_TS",
INT: "net.CHG_INT",
SDA: "net.I2C_SDA",
} }), jsx("capacitor", { name: "C_PMID", capacitance: "4.7uF", footprint: "0402", pcbX: 20.9, pcbY: 15, connections: { pin1: "net.PMID", pin2: "net.GND" } }), jsx("capacitor", { name: "C_CHG_VIN", capacitance: "100nF", footprint: "0402", pcbX: 27.1, pcbY: 15, connections: { pin1: "net.VBUS", pin2: "net.GND" } }), jsx("chip", { name: "IC2", pcbX: 39, pcbY: 19, pinLabels: {
pin1: "AC1",
pin2: "AC1B",
pin3: "BOOT1",
pin4: "RECT",
pin5: "CLAMP1",
pin6: "OUT",
pin7: "OUT2",
pin8: "FOD",
pin9: "TERM",
pin10: "ILIM",
pin11: "TS_CTRL",
pin12: "AD",
pin13: "AD_EN",
pin14: "EN1",
pin15: "EN2",
pin16: "COMM2",
pin17: "COMM1",
pin18: "CHG",
pin19: "PGND",
pin20: "PGND2",
pin21: "CLAMP2",
pin22: "RECT2",
pin23: "BOOT2",
pin24: "AC2B",
pin25: "AC2",
pin26: "SDA",
pin27: "SCL",
pin28: "INT",
pin29: "GND",
}, footprint: bq51013Footprint(), connections: {
AC1: "net.QI_AC1",
AC1B: "net.QI_AC1",
BOOT1: "net.QI_BOOT1",
RECT: "net.QI_VOUT",
CLAMP1: "net.QI_CLAMP1",
OUT: "net.QI_VOUT",
OUT2: "net.QI_VOUT",
FOD: "net.QI_FOD",
TERM: "net.QI_TERM",
ILIM: "net.QI_ILIM",
TS_CTRL: "net.QI_TS",
AD: "net.QI_AD",
AD_EN: "net.GND",
EN1: "net.GND",
EN2: "net._3V3",
COMM2: "net.QI_COMM2",
COMM1: "net.QI_COMM1",
CHG: "net.QI_CHG",
PGND: "net.GND",
PGND2: "net.GND",
CLAMP2: "net.QI_CLAMP2",
RECT2: "net.QI_VOUT",
BOOT2: "net.QI_BOOT2",
AC2B: "net.QI_AC2",
AC2: "net.QI_AC2",
SDA: "net.I2C_SDA",
SCL: "net.I2C_SCL",
INT: "net.QI_INT",
GND: "net.GND",
} }), jsx("capacitor", { name: "C_QI_AC1", capacitance: "22uF", footprint: "0805", pcbX: 44.6, pcbY: 19, connections: { pin1: "net.QI_AC1", pin2: "net.GND" } }), jsx("capacitor", { name: "C_QI_AC2", capacitance: "22uF", footprint: "0805", pcbX: 43.85, pcbY: 21.8, connections: { pin1: "net.QI_AC2", pin2: "net.GND" } }), jsx("capacitor", { name: "C_QI_VOUT", capacitance: "22uF", footprint: "0805", pcbX: 40.5, pcbY: 27.0, connections: { pin1: "net.QI_VOUT", pin2: "net.GND" } }), jsx("capacitor", { name: "C_QI_BOOT1", capacitance: "100nF", footprint: "0402", pcbX: 39, pcbY: 24.6, connections: { pin1: "net.QI_BOOT1", pin2: "net.QI_AC1" } }), jsx("capacitor", { name: "C_QI_BOOT2", capacitance: "100nF", footprint: "0402", pcbX: 36.2, pcbY: 23.85, connections: { pin1: "net.QI_BOOT2", pin2: "net.QI_AC2" } }), jsx("capacitor", { name: "C_QI_CLAMP1", capacitance: "100nF", footprint: "0402", pcbX: 34.15, pcbY: 21.8, connections: { pin1: "net.QI_CLAMP1", pin2: "net.GND" } }), jsx("capacitor", { name: "C_QI_CLAMP2", capacitance: "100nF", footprint: "0402", pcbX: 33.4, pcbY: 19, connections: { pin1: "net.QI_CLAMP2", pin2: "net.GND" } }), jsx("resistor", { name: "R_QI_FOD", resistance: "100k", footprint: "0402", pcbX: 34.15, pcbY: 16.2, connections: { pin1: "net.QI_FOD", pin2: "net.GND" } }), jsx("resistor", { name: "R_QI_TERM", resistance: "10k", footprint: "0402", pcbX: 36.2, pcbY: 14.15, connections: { pin1: "net.QI_TERM", pin2: "net.GND" } }), jsx("resistor", { name: "R_QI_ILIM", resistance: "10k", footprint: "0402", pcbX: 39, pcbY: 13.4, connections: { pin1: "net.QI_ILIM", pin2: "net.GND" } }), jsx("resistor", { name: "R_QI_TS", resistance: "10k", footprint: "0402", pcbX: 41.8, pcbY: 14.15, connections: { pin1: "net.QI_TS", pin2: "net.GND" } }), jsx("resistor", { name: "R_QI_OR", resistance: "0", footprint: "0402", pcbX: 43.85, pcbY: 16.2, connections: { pin1: "net.QI_VOUT", pin2: "net.VSYS" } }), jsx("chip", { name: "U5", pcbX: 27, pcbY: 6, pinLabels: {
pin1: "GPOUT",
pin2: "BAT",
pin3: "BIN",
pin4: "SDA",
pin5: "SCL",
pin6: "SE",
pin7: "VSS",
pin8: "SRP",
pin9: "SRN",
pin10: "REGIN",
pin11: "BAT2",
pin12: "VCC",
}, footprint: bq27220Footprint(), connections: {
GPOUT: "net.FG_ALERT",
BAT: "net.BAT_FG_SENSE", // FIX iter-3: BAT/BAT2 pins ADC-sense via 1k series (R_FG_BAT) per SLUSCY9 §7.1 ESD protection
BIN: "net.BAT_P",
SDA: "net.I2C_SDA",
SCL: "net.I2C_SCL",
SE: "net._3V3",
VSS: "net.GND",
SRP: "net.BAT_P",
SRN: "net.GND",
REGIN: "net._3V3",
BAT2: "net.BAT_FG_SENSE", // shared with BAT pin behind same 1k series
VCC: "net._3V3",
} }), jsx("capacitor", { name: "C_FG_VCC", capacitance: "100nF", footprint: "0402", pcbX: 30.1, pcbY: 6, connections: { pin1: "net._3V3", pin2: "net.GND" } }), jsx("resistor", { name: "R_FG_BAT", resistance: "1k", footprint: "0402", pcbX: 28.6, pcbY: 4.4, connections: { pin1: "net.BAT_P", pin2: "net.BAT_FG_SENSE" } }), jsx("chip", { name: "IC3", pcbX: 22, pcbY: 6, pinLabels: {
pin1: "VIN",
pin2: "EN",
pin3: "MODE",
pin4: "AGND",
pin5: "PGND",
pin6: "SW",
pin7: "FB",
pin8: "VOS",
}, footprint: tps62840Footprint(), connections: {
VIN: "net.VSYS",
EN: "net.VSYS",
MODE: "net.GND",
AGND: "net.GND",
PGND: "net.GND",
SW: "net.SW_BUCK",
FB: "net.FB_BUCK",
VOS: "net._3V3",
} }), jsx("inductor", { name: "L1", inductance: "2.2uH", footprint: "0805", pcbX: 18, pcbY: 6, connections: { pin1: "net.SW_BUCK", pin2: "net._3V3" } }), jsx("capacitor", { name: "C_BUCK_IN", capacitance: "10uF", footprint: "0603", pcbX: 25.1, pcbY: 6, connections: { pin1: "net.VSYS", pin2: "net.GND" } }), jsx("capacitor", { name: "C_BUCK_OUT", capacitance: "10uF", footprint: "0603", pcbX: 22, pcbY: 9.1, connections: { pin1: "net._3V3", pin2: "net.GND" } }), jsx("resistor", { name: "R_FB_TOP", resistance: "390k", footprint: "0402", pcbX: 19.0, pcbY: 8.5, connections: { pin1: "net._3V3", pin2: "net.FB_BUCK" } }), jsx("resistor", { name: "R_FB_BOT", resistance: "86.6k", footprint: "0402", pcbX: 22, pcbY: 2.9, connections: { pin1: "net.FB_BUCK", pin2: "net.GND" } }), jsx("chip", { name: "U4", pcbX: 26, pcbY: 11, pinLabels: {
pin1: "IN",
pin2: "GND",
pin3: "NR",
pin4: "NC",
pin5: "EN",
pin6: "OUT",
}, footprint: tps7a02Footprint(), connections: {
IN: "net._3V3",
GND: "net.GND",
NR: "net.LDO_NR",
NC: "net.LDO_NC",
EN: "net._3V3",
OUT: "net._1V8",
} }), jsx("capacitor", { name: "C_LDO_IN", capacitance: "100nF", footprint: "0402", pcbX: 28.6, pcbY: 11, connections: { pin1: "net._3V3", pin2: "net.GND" } }), jsx("capacitor", { name: "C_LDO_OUT", capacitance: "100nF", footprint: "0402", pcbX: 24.7, pcbY: 13.25, connections: { pin1: "net._1V8", pin2: "net.GND" } }), jsx("capacitor", { name: "C_LDO_NR", capacitance: "10nF", footprint: "0402", pcbX: 24.7, pcbY: 8.75, connections: { pin1: "net.LDO_NR", pin2: "net.GND" } }), jsx("capacitor", { name: "C21", capacitance: "10uF", footprint: "1210", pcbX: 32.0, pcbY: 13.0, connections: { pin1: "net.VSYS", pin2: "net.GND" } }), jsx("chip", { name: "IC1", pcbX: 11, pcbY: 17, pinLabels: {
pin1: "VDD",
pin2: "XL1",
pin3: "XL2",
pin4: "MODEM_RESET_N",
pin5: "MODEM_PWRKEY",
pin6: "IMU_INT",
pin7: "MODEM_DTR",
pin8: "GND",
pin9: "CHG_INT_IN",
pin10: "FG_ALERT_IN",
pin11: "QI_INT_IN",
pin12: "NC12",
pin13: "NC13",
pin14: "NC14",
pin15: "NC15",
pin16: "NC16",
pin17: "USBD_DM",
pin18: "USBD_DP",
pin19: "VBUS_DETECT",
pin20: "NC20",
pin21: "NC21",
pin22: "NC22",
pin23: "NC23",
pin24: "NC24",
pin25: "NC25",
pin26: "NC26",
pin27: "NC27",
pin28: "NC28",
pin29: "VDDHDMI",
pin30: "NC30",
pin31: "NC31",
pin32: "NC32",
pin33: "NC33",
pin34: "GND34",
pin35: "DCCH",
pin36: "VDD36",
pin37: "SCL",
pin38: "SDA",
pin39: "MODEM_RX",
pin40: "MODEM_TX",
pin41: "GND41",
pin42: "AVDD",
pin43: "NC43",
pin44: "NC44",
pin45: "NC45",
pin46: "NC46",
pin47: "NC47",
pin48: "NC48",
pin49: "NC49",
pin50: "NC50",
pin51: "NC51",
pin52: "NC52",
pin53: "NC53",
pin54: "NC54",
pin55: "NC55",
pin56: "NC56",
pin57: "NC57",
pin58: "NC58",
pin59: "GND59",
pin60: "VDD60",
pin61: "DEC1",
pin62: "DEC2",
pin63: "DEC3",
pin64: "DEC4",
pin65: "VDD65",
pin66: "GND66",
pin67: "SWDIO",
pin68: "SWDCLK",
pin69: "GND69",
pin70: "RESET_N",
pin71: "GND71",
pin72: "XC1",
pin73: "EP",
}, footprint: nrf52840Footprint(), connections: {
// Power
VDD: "net._3V3",
VDD36: "net._3V3",
VDD60: "net._3V3",
VDD65: "net._3V3",
AVDD: "net._3V3",
VDDHDMI: "net._3V3",
GND: "net.GND",
GND34: "net.GND",
GND41: "net.GND",
GND59: "net.GND",
GND66: "net.GND",
GND69: "net.GND",
GND71: "net.GND",
EP: "net.GND",
// Decoupling pins (connected externally via caps)
DEC1: "net.MCU_DEC1",
DEC2: "net.MCU_DEC2",
DEC3: "net.MCU_DEC3",
DEC4: "net.MCU_DEC4",
DCCH: "net.MCU_DCCH",
// 32kHz LFXO crystal — P0.00/XL1, P0.01/XL2
XL1: "net.LFXO_XIN",
XL2: "net.LFXO_XOUT",
// 32MHz HFXO crystal
XC1: "net.HFXO_XIN",
// SWD debug
SWDIO: "net.SWDIO",
SWDCLK: "net.SWDCLK",
RESET_N: "net.MCU_NRST",
// USB
USBD_DM: "net.USB_DM",
USBD_DP: "net.USB_DP",
VBUS_DETECT: "net.VBUS",
// I2C bus (shared: BQ25180 0x6A, BQ27220 0x55, BQ51013 0x6E, BNO086 0x4A)
SDA: "net.I2C_SDA",
SCL: "net.I2C_SCL",
// UART to BG95 modem (v1 bug fix: TX≠IMU_CS — use P0.31/P0.30)
MODEM_TX: "net.MODEM_TX",
MODEM_RX: "net.MODEM_RX",
// Modem control GPIOs
MODEM_PWRKEY: "net.MODEM_PWRKEY",
MODEM_RESET_N: "net.MODEM_RESET_N",
MODEM_DTR: "net.MODEM_DTR",
// Interrupt inputs
IMU_INT: "net.IMU_INT",
CHG_INT_IN: "net.CHG_INT",
FG_ALERT_IN: "net.FG_ALERT",
QI_INT_IN: "net.QI_INT",
// Unconnected
NC12: "net.MCU_NC",
NC13: "net.MCU_NC",
NC14: "net.MCU_NC",
NC15: "net.MCU_NC",
NC16: "net.MCU_NC",
NC20: "net.MCU_NC",
NC21: "net.MCU_NC",
NC22: "net.MCU_NC",
NC23: "net.MCU_NC",
NC24: "net.MCU_NC",
NC25: "net.MCU_NC",
NC26: "net.MCU_NC",
NC27: "net.MCU_NC",
NC28: "net.MCU_NC",
NC30: "net.MCU_NC",
NC31: "net.MCU_NC",
NC32: "net.MCU_NC",
NC33: "net.MCU_NC",
NC43: "net.MCU_NC",
NC44: "net.MCU_NC",
NC45: "net.MCU_NC",
NC46: "net.MCU_NC",
NC47: "net.MCU_NC",
NC48: "net.MCU_NC",
NC49: "net.MCU_NC",
NC50: "net.MCU_NC",
NC51: "net.MCU_NC",
NC52: "net.MCU_NC",
NC53: "net.MCU_NC",
NC54: "net.MCU_NC",
NC55: "net.MCU_NC",
NC56: "net.MCU_NC",
NC57: "net.MCU_NC",
NC58: "net.MCU_NC",
} }), jsx("capacitor", { name: "C_MCU_VDD", capacitance: "100nF", footprint: "0402", pcbX: 18.1, pcbY: 17, connections: { pin1: "net._3V3", pin2: "net.GND" } }), jsx("capacitor", { name: "C_MCU_AVDD", capacitance: "100nF", footprint: "0402", pcbX: 17.5, pcbY: 22.0, connections: { pin1: "net._3V3", pin2: "net.GND" } }), jsx("capacitor", { name: "C_MCU_DEC1", capacitance: "100nF", footprint: "0402", pcbX: 13.19, pcbY: 23.75, connections: { pin1: "net.MCU_DEC1", pin2: "net.GND" } }), jsx("capacitor", { name: "C_MCU_DEC2", capacitance: "100nF", footprint: "0402", pcbX: 8.81, pcbY: 23.75, connections: { pin1: "net.MCU_DEC2", pin2: "net.GND" } }), jsx("capacitor", { name: "C_MCU_DEC3", capacitance: "100nF", footprint: "0402", pcbX: 8.5, pcbY: 27.0, connections: { pin1: "net.MCU_DEC3", pin2: "net.GND" } }), jsx("capacitor", { name: "C_MCU_DEC4", capacitance: "100nF", footprint: "0402", pcbX: 3.9, pcbY: 17, connections: { pin1: "net.MCU_DEC4", pin2: "net.GND" } }), jsx("capacitor", { name: "C_MCU_DCCH", capacitance: "100nF", footprint: "0402", pcbX: 5.26, pcbY: 9.5, connections: { pin1: "net.MCU_DCCH", pin2: "net.GND" } }), jsx("resistor", { name: "R_MCU_RST", resistance: "10k", footprint: "0402", pcbX: 8.81, pcbY: 10.25, connections: { pin1: "net._3V3", pin2: "net.MCU_NRST" } }), jsx("resistor", { name: "R_SDA", resistance: "4.7k", footprint: "0402", pcbX: 13.19, pcbY: 10.25, connections: { pin1: "net._3V3", pin2: "net.I2C_SDA" } }), jsx("resistor", { name: "R_SCL", resistance: "4.7k", footprint: "0402", pcbX: 16.74, pcbY: 11.0, connections: { pin1: "net._3V3", pin2: "net.I2C_SCL" } }), jsx("chip", { name: "X1", footprint: crystalHfxoFootprint(), pcbX: 4, pcbY: 22, pinLabels: {
pin1: "XIN",
pin2: "GND",
pin3: "XOUT",
pin4: "GND2",
}, connections: {
XIN: "net.HFXO_XIN",
GND: "net.GND",
XOUT: "net.HFXO_XOUT",
GND2: "net.GND",
} }), jsx("capacitor", { name: "C_HFXO1", capacitance: "12pF", footprint: "0402", pcbX: 7.6, pcbY: 22, connections: { pin1: "net.HFXO_XIN", pin2: "net.GND" } }), jsx("capacitor", { name: "C_HFXO2", capacitance: "12pF", footprint: "0402", pcbX: 1.4, pcbY: 22, connections: { pin1: "net.HFXO_XOUT", pin2: "net.GND" } }), jsx("chip", { name: "Y1", footprint: crystalLfxoFootprint(), pcbX: 4, pcbY: 12, pinLabels: {
pin1: "XIN",
pin2: "XOUT",
}, connections: {
XIN: "net.LFXO_XIN",
XOUT: "net.LFXO_XOUT",
} }), jsx("capacitor", { name: "C_LFXO1", capacitance: "12pF", footprint: "0402", pcbX: 7.6, pcbY: 12, connections: { pin1: "net.LFXO_XIN", pin2: "net.GND" } }), jsx("capacitor", { name: "C_LFXO2", capacitance: "12pF", footprint: "0402", pcbX: 1.4, pcbY: 12, connections: { pin1: "net.LFXO_XOUT", pin2: "net.GND" } }), jsx("chip", { name: "U1", pcbX: 11, pcbY: 6, pinLabels: {
pin1: "GND1",
pin2: "RSTB",
pin3: "GND3",
pin4: "BOOTN",
pin5: "INTN",
pin6: "GND6",
pin7: "VDDIO",
pin8: "SDA",
pin9: "SCL",
pin10: "GND10",
pin11: "ADR",
pin12: "GND12",
pin13: "GND13",
pin14: "GPIO0",
pin15: "GPIO1",
pin16: "GND16",
pin17: "GND17",
pin18: "GND18",
pin19: "VDD",
pin20: "GND20",
pin21: "GND21",
pin22: "GND22",
pin23: "GND23",
pin24: "GND24",
pin25: "GND25",
pin26: "GND26",
pin27: "GND27",
pin28: "GND28",
}, footprint: bno086Footprint(), connections: {
GND1: "net.GND",
RSTB: "net._3V3", // held high; MCU can drive low via open-drain if needed
GND3: "net.GND",
BOOTN: "net._3V3", // normal boot (not DFU)
INTN: "net.IMU_INT", // → IC1 pin6 (P0.04)
GND6: "net.GND",
VDDIO: "net._1V8", // 1.8V I/O from TPS7A02
SDA: "net.I2C_SDA",
SCL: "net.I2C_SCL",
GND10: "net.GND",
ADR: "net.GND", // ADR=GND → I2C addr 0x4A ✓
GND12: "net.GND",
GND13: "net.GND",
GPIO0: "net.GND",
GPIO1: "net.GND",
GND16: "net.GND",
GND17: "net.GND",
GND18: "net.GND",
VDD: "net._3V3", // 3.3V core supply
GND20: "net.GND",
GND21: "net.GND",
GND22: "net.GND",
GND23: "net.GND",
GND24: "net.GND",
GND25: "net.GND",
GND26: "net.GND",
GND27: "net.GND",
GND28: "net.GND",
} }), jsx("capacitor", { name: "C_IMU_VDD", capacitance: "100nF", footprint: "0402", pcbX: 16.1, pcbY: 4, connections: { pin1: "net._3V3", pin2: "net.GND" } }), jsx("capacitor", { name: "C_IMU_VDDIO", capacitance: "100nF", footprint: "0402", pcbX: 5.9, pcbY: 6, connections: { pin1: "net._1V8", pin2: "net.GND" } }), jsx("chip", { name: "U2", pcbX: 18, pcbY: 36, pinLabels: {
pin1: "GND1",
pin2: "VDD_EXT",
pin3: "STATUS",
pin4: "W_DISABLE_N",
pin5: "PWRKEY",
pin6: "RESET_N",
pin7: "GND7",
pin8: "GND8",
pin9: "UART_TX",
pin10: "UART_RX",
pin11: "GND11",
pin12: "GND12",
pin13: "USIM_VCC",
pin14: "USIM_DATA",
pin15: "USIM_CLK",
pin16: "USIM_RST",
pin17: "GND17",
pin18: "VBAT",
pin19: "GND19",
pin20: "GND20",
pin21: "GND21",
pin22: "GND22",
pin23: "GND23",
pin24: "GND24",
pin25: "GND25",
pin26: "GND26",
pin27: "GND27",
pin28: "GND28",
pin29: "GND29",
pin30: "GND30",
pin31: "GND31",
pin32: "GND32",
pin33: "GND33",
pin34: "GND34",
pin35: "GND35",
pin36: "GND36",
pin37: "GND37",
pin38: "GND38",
pin39: "GND39",
pin40: "GND40",
pin41: "GND41",
pin42: "GND42",
pin50: "VBAT50",
pin51: "VBAT51",
pin52: "VBAT52",
pin53: "VBAT53",
pin54: "VBAT54",
pin55: "GND55",
pin56: "GND56",
pin57: "GND57",
pin58: "GND58",
pin59: "GND59",
}, footprint: bg95Footprint(), connections: {
GND1: "net.GND",
VDD_EXT: "net.MODEM_VDD_EXT", // 1.8V aux out — not connected to MCU
STATUS: "net.GND", // optional status monitor, tie low
W_DISABLE_N: "net._3V3", // pull high → RF always enabled
PWRKEY: "net.MODEM_PWRKEY", // → IC1 pin5 (P0.03)
RESET_N: "net.MODEM_RESET_N", // → IC1 pin4 (P0.02)
GND7: "net.GND",
GND8: "net.GND",
UART_TX: "net.MODEM_TX", // modem TX → nRF RX (P0.30)
UART_RX: "net.MODEM_RX", // modem RX ← nRF TX (P0.31)
GND11: "net.GND",
GND12: "net.GND",
USIM_VCC: "net.ESIM_VCC",
USIM_DATA: "net.ESIM_DATA",
USIM_CLK: "net.ESIM_CLK",
USIM_RST: "net.ESIM_RST",
GND17: "net.GND",
VBAT: "net.BAT_P", // modem powered from battery rail
GND19: "net.GND", GND20: "net.GND", GND21: "net.GND",
GND22: "net.GND", GND23: "net.GND", GND24: "net.GND",
GND25: "net.GND", GND26: "net.GND", GND27: "net.GND",
GND28: "net.GND", GND29: "net.GND", GND30: "net.GND",
GND31: "net.GND", GND32: "net.GND", GND33: "net.GND",
GND34: "net.GND", GND35: "net.GND", GND36: "net.GND",
GND37: "net.GND", GND38: "net.GND", GND39: "net.GND",
GND40: "net.GND", GND41: "net.GND", GND42: "net.GND",
VBAT50: "net.BAT_P", VBAT51: "net.BAT_P", VBAT52: "net.BAT_P",
VBAT53: "net.BAT_P", VBAT54: "net.BAT_P",
GND55: "net.GND", GND56: "net.GND", GND57: "net.GND",
GND58: "net.GND", GND59: "net.GND",
} }), jsx("capacitor", { name: "C_BG95_BAT1", capacitance: "4.7uF", footprint: "0402", pcbX: 32.1, pcbY: 36, connections: { pin1: "net.BAT_P", pin2: "net.GND" } }), jsx("capacitor", { name: "C_BG95_BAT2", capacitance: "4.7uF", footprint: "0402", pcbX: 18, pcbY: 48, connections: { pin1: "net.BAT_P", pin2: "net.GND" } }), jsx("capacitor", { name: "C_BG95_BAT3", capacitance: "10uF", footprint: "0603", pcbX: 3.9, pcbY: 39.5, connections: { pin1: "net.BAT_P", pin2: "net.GND" } }), jsx("capacitor", { name: "C_BG95_UART", capacitance: "100nF", footprint: "0402", pcbX: 21.5, pcbY: 21.9, connections: { pin1: "net._3V3", pin2: "net.GND" } }), jsx("chip", { name: "U8", pcbX: 38, pcbY: 36, pinLabels: {
pin1: "VCC",
pin2: "RST",
pin3: "CLK",
pin4: "GND",
pin5: "VPP",
pin6: "IO",
}, footprint: esimFootprint(), connections: {
VCC: "net.ESIM_VCC",
RST: "net.ESIM_RST",
CLK: "net.ESIM_CLK",
GND: "net.GND",
VPP: "net.GND", // VPP not used in 3GPP LTE-M / NB-IoT
IO: "net.ESIM_DATA",
} }), jsx("capacitor", { name: "C_ESIM_VCC", capacitance: "100nF", footprint: "0402", pcbX: 43.6, pcbY: 36, connections: { pin1: "net.ESIM_VCC", pin2: "net.GND" } }), jsx("copperpour", { name: "GP_TOP", layer: "top", connectsTo: "net.GND", boardEdgeMargin: "1.5mm", clearance: "0.2mm" }), jsx("copperpour", { name: "GP_BOTTOM", layer: "bottom", connectsTo: "net.GND", boardEdgeMargin: "1.5mm", clearance: "0.2mm" }), jsx("keepout", { shape: "circle", radius: "5mm", pcbX: 18, pcbY: 46 }), jsx("keepout", { shape: "rect", pcbX: 25, pcbY: 49.25, width: "50mm", height: "1.5mm" }), jsx("keepout", { shape: "rect", pcbX: 25, pcbY: 0.75, width: "50mm", height: "1.5mm" }), jsx("keepout", { shape: "rect", pcbX: 0.75, pcbY: 25, width: "1.5mm", height: "50mm" }), jsx("keepout", { shape: "rect", pcbX: 49.25, pcbY: 25, width: "1.5mm", height: "50mm" }), jsx("inductor", { name: "L_ANT_S", inductance: "2.7nH", footprint: "0402", pcbX: 21, pcbY: 46.3, connections: { pin1: "net.RF_NODE_A", pin2: "net.RF_NODE_B" } }), jsx("capacitor", { name: "C_ANT_SH", capacitance: "1.5pF", footprint: "0402", pcbX: 23, pcbY: 46.3, connections: { pin1: "net.RF_NODE_B", pin2: "net.GND" } }), jsx("inductor", { name: "L_ANT_S2", inductance: "2.7nH", footprint: "0402", pcbX: 21, pcbY: 47.1, connections: { pin1: "net.RF_NODE_B", pin2: "net.ANT_FEED" } }), jsx("chip", { name: "ANT1", footprint: "0805", pcbX: 22, pcbY: 48.0, pinLabels: { "1": "FEED", "2": "GND" }, connections: {
FEED: "net.ANT_FEED",
GND: "net.GND",
} }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 5, pcbY: 37, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 5, pcbY: 40, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 5, pcbY: 43, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 31, pcbY: 37, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 31, pcbY: 40, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 31, pcbY: 43, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 12, pcbY: 47, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 24, pcbY: 47, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 12, pcbY: 48.2, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 24, pcbY: 48.2, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 14, pcbY: 25.5, connectsTo: "net.GND" }), jsx("via", { fromLayer: "top", toLayer: "bottom", holeDiameter: "0.3mm", outerDiameter: "0.6mm", pcbX: 22, pcbY: 25.5, connectsTo: "net.GND" })] }) }));
export { index_circuit as default };
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