mpsys/cree-led-pcb
This circuit diagram depicts a compact LED driver module featuring a TPS923655DMTR LED driver IC, input filtering and storage components (capacitors, inductor, diode), sensing and control resistors, output filtering capacitors, and various support passive components arranged on a 2-layer PCB with mounting holes.
- Version
- 1.0.2
- License
- unset
- Stars
- 0
dist/driver-board/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pgnd",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"agnd",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"vin",
"3"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "pin4",
"pin_number": 4,
"port_hints": [
"pin4",
"vcc",
"4"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "pin5",
"pin_number": 5,
"port_hints": [
"pin5",
"adim",
"5"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "pin6",
"pin_number": 6,
"port_hints": [
"pin6",
"en",
"6"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "pin7",
"pin_number": 7,
"port_hints": [
"pin7",
"fault",
"7"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "pin8",
"pin_number": 8,
"port_hints": [
"pin8",
"sw",
"8"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "pin9",
"pin_number": 9,
"port_hints": [
"pin9",
"csp",
"9"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "pin10",
"pin_number": 10,
"port_hints": [
"pin10",
"csn",
"10"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_10",
"name": "pin11",
"pin_number": 11,
"port_hints": [
"pin11",
"ovp",
"11"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_11",
"name": "pin12",
"pin_number": 12,
"port_hints": [
"pin12",
"comp",
"12"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_port",
"source_port_id": "source_port_12",
"name": "pin13",
"pin_number": 13,
"port_hints": [
"pin13",
"fset",
"13"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_13",
"name": "pin14",
"pin_number": 14,
"port_hints": [
"pin14",
"temp",
"14"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_14",
"name": "pin15",
"pin_number": 15,
"port_hints": [
"pin15",
"thermal",
"15"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_chip",
"name": "U1",
"manufacturer_part_number": "TPS923655DMTR",
"supplier_part_numbers": {
"jlcpcb": [
"C22427698"
]
},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_15",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_16",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_capacitor",
"name": "CIN",
"supplier_part_numbers": {
"jlcpcb": [
"C13585",
"C7432781",
"C89632"
]
},
"capacitance": 0.00001,
"display_capacitance": "10µF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_17",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_18",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"name": "L1",
"ftype": "simple_inductor",
"inductance": "10µH",
"display_inductance": "10µH",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_19",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"left",
"1"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_20",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"right",
"2"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_component",
"source_component_id": "source_component_3",
"ftype": "simple_diode",
"name": "D1",
"supplier_part_numbers": {
"jlcpcb": [
"C3014012",
"C3014023",
"C2909831"
]
},
"are_pins_interchangeable": false,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_21",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_22",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_4",
"ftype": "simple_capacitor",
"name": "COUT",
"supplier_part_numbers": {
"jlcpcb": [
"C13585",
"C7432781",
"C89632"
]
},
"capacitance": 0.00001,
"display_capacitance": "10µF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_23",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_24",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_5",
"ftype": "simple_resistor",
"name": "RSENSE",
"supplier_part_numbers": {
"jlcpcb": [
"C25334",
"C188071",
"C7467250"
]
},
"resistance": 0.1,
"display_resistance": "100mΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_25",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"vin",
"1"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_6",
"ftype": "simple_chip",
"name": "VIN_PAD",
"supplier_part_numbers": {},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_26",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"gnd",
"1"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_7",
"ftype": "simple_chip",
"name": "GND_PAD",
"supplier_part_numbers": {},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_27",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"1"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_component",
"source_component_id": "source_component_8",
"ftype": "simple_chip",
"name": "LED_OUT",
"supplier_part_numbers": {},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_28",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"cathode",
"1"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_component",
"source_component_id": "source_component_9",
"ftype": "simple_chip",
"name": "LED_GND",
"supplier_part_numbers": {},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_29",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_30",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_10",
"ftype": "simple_capacitor",
"name": "CVCC",
"supplier_part_numbers": {
"jlcpcb": [
"C28323",
"C215803",
"C376929"
]
},
"capacitance": 0.000001,
"display_capacitance": "1µF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_31",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_32",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_11",
"ftype": "simple_resistor",
"name": "RFSET",
"supplier_part_numbers": {
"jlcpcb": [
"C149504",
"C25611",
"C2907293"
]
},
"resistance": 100000,
"display_resistance": "100kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_33",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_port",
"source_port_id": "source_port_34",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_component",
"source_component_id": "source_component_12",
"ftype": "simple_capacitor",
"name": "CCOMP",
"supplier_part_numbers": {
"jlcpcb": [
"C1710",
"C83170",
"C52278"
]
},
"capacitance": 1e-8,
"display_capacitance": "10nF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_35",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_port",
"source_port_id": "source_port_36",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_13",
"ftype": "simple_resistor",
"name": "RCOMP",
"supplier_part_numbers": {
"jlcpcb": [
"C17414",
"C2930231",
"C84376"
]
},
"resistance": 10000,
"display_resistance": "10kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_37",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_38",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_component",
"source_component_id": "source_component_14",
"ftype": "simple_resistor",
"name": "ROVP1",
"supplier_part_numbers": {
"jlcpcb": [
"C17414",
"C2930231",
"C84376"
]
},
"resistance": 10000,
"display_resistance": "10kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_39",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_15",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_40",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_15",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_15",
"ftype": "simple_resistor",
"name": "ROVP2",
"supplier_part_numbers": {
"jlcpcb": [
"C17661",
"C2907324",
"C25633"
]
},
"resistance": 3000,
"display_resistance": "3kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_41",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_42",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_16",
"ftype": "simple_resistor",
"name": "RTEMP",
"supplier_part_numbers": {
"jlcpcb": [
"C17477",
"C2907215",
"C2907288"
]
},
"resistance": 0,
"display_resistance": "0Ω",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_43",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_17",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_44",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_17",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_17",
"ftype": "simple_resistor",
"name": "RFAULT",
"supplier_part_numbers": {
"jlcpcb": [
"C17477",
"C2907215",
"C2907288"
]
},
"resistance": 0,
"display_resistance": "0Ω",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_45",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_18",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_port",
"source_port_id": "source_port_46",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_18",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_18",
"ftype": "simple_resistor",
"name": "RADIM",
"supplier_part_numbers": {
"jlcpcb": [
"C149504",
"C25611",
"C2907293"
]
},
"resistance": 100000,
"display_resistance": "100kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_47",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_19",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_port",
"source_port_id": "source_port_48",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_19",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_19",
"ftype": "simple_resistor",
"name": "REN",
"supplier_part_numbers": {
"jlcpcb": [
"C149504",
"C25611",
"C2907293"
]
},
"resistance": 100000,
"display_resistance": "100kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_0",
"name": "GND",
"member_source_group_ids": [],
"is_ground": true,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_board",
"source_board_id": "source_board_0",
"source_group_id": "source_group_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component CIN has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_1",
"refdes": "CIN",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CIN",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component COUT has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_4",
"refdes": "COUT",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "COUT",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_1"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component RSENSE has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_5",
"refdes": "RSENSE",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RSENSE",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_2"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component CVCC has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_10",
"refdes": "CVCC",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CVCC",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_3"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component RFSET has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_11",
"refdes": "RFSET",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RFSET",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_4"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component CCOMP has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_12",
"refdes": "CCOMP",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CCOMP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_5"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component RCOMP has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_13",
"refdes": "RCOMP",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RCOMP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_6"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component ROVP1 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_14",
"refdes": "ROVP1",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "ROVP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_7"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component ROVP2 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_15",
"refdes": "ROVP2",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "ROVP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_8"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component RTEMP has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_16",
"refdes": "RTEMP",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RTEMP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_9"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component RFAULT has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_17",
"refdes": "RFAULT",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RFAULT",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_10"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component RADIM has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_18",
"refdes": "RADIM",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RADIM",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_11"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component REN has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_19",
"refdes": "REN",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "REN",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_12"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_25",
"source_port_15"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": null,
"display_name": ".VIN_PAD > .vin to .CIN > .pos",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
"message": "<trace#196(from:.VIN_PAD > .vin to:.CIN > .pos) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_0",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_15",
"source_port_2"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": null,
"display_name": ".CIN > .pos to .U1 > .vin",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
"message": "<trace#197(from:.CIN > .pos to:.U1 > .vin) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_1",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_16"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": null,
"display_name": ".CIN > .neg to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
"message": "<trace#198(from:.CIN > .neg to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_2",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_7",
"source_port_17"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U1 > .sw to .L1 > .pin1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
"message": "<trace#199(from:.U1 > .sw to:.L1 > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_3",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_18",
"source_port_19"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".L1 > .pin2 to .D1 > .anode",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
"message": "<trace#200(from:.L1 > .pin2 to:.D1 > .anode) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_4",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_20",
"source_port_21"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": null,
"display_name": ".D1 > .cathode to .COUT > .pos",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
"message": "<trace#201(from:.D1 > .cathode to:.COUT > .pos) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_5",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_21",
"source_port_27"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": null,
"display_name": ".COUT > .pos to .LED_OUT > .anode",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
"message": "<trace#202(from:.COUT > .pos to:.LED_OUT > .anode) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_6",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_22"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": null,
"display_name": ".COUT > .neg to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
"message": "<trace#203(from:.COUT > .neg to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_7",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_8",
"connected_source_port_ids": [
"source_port_28",
"source_port_23"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".LED_GND > .cathode to .RSENSE > .pin1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
"message": "<trace#204(from:.LED_GND > .cathode to:.RSENSE > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_8",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_9",
"connected_source_port_ids": [
"source_port_24"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".RSENSE > .pin2 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
"message": "<trace#205(from:.RSENSE > .pin2 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_9",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_10",
"connected_source_port_ids": [
"source_port_8",
"source_port_23"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U1 > .csp to .RSENSE > .pin1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
"message": "<trace#206(from:.U1 > .csp to:.RSENSE > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_10",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_11",
"connected_source_port_ids": [
"source_port_9",
"source_port_24"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U1 > .csn to .RSENSE > .pin2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
"message": "<trace#207(from:.U1 > .csn to:.RSENSE > .pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_11",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_29"
],
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{
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"message": "<trace#208(from:.U1 > .vcc to:.CVCC > .pos) /> is missing a name. Add a name prop to make the trace easier to identify.",
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},
{
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{
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"message": "<trace#209(from:.CVCC > .neg to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
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],
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],
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},
{
"type": "source_unnamed_trace_warning",
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"message": "<trace#210(from:.U1 > .pgnd to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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],
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},
{
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"message": "<trace#211(from:.U1 > .agnd to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
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],
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],
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},
{
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"message": "<trace#212(from:.GND_PAD > .gnd to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_12",
"source_port_31"
],
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},
{
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"message": "<trace#213(from:.U1 > .fset to:.RFSET > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
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},
{
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],
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],
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},
{
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"message": "<trace#214(from:.RFSET > .pin2 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_33"
],
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},
{
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"message": "<trace#215(from:.U1 > .comp to:.CCOMP > .pos) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_34",
"source_port_35"
],
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},
{
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"message": "<trace#216(from:.CCOMP > .neg to:.RCOMP > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_36"
],
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"source_net_0"
],
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},
{
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"message": "<trace#217(from:.RCOMP > .pin2 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_21",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_27",
"source_port_37"
],
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"display_name": ".LED_OUT > .anode to .ROVP1 > .pin1",
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},
{
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"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_22",
"message": "<trace#218(from:.LED_OUT > .anode to:.ROVP1 > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_38",
"source_port_10"
],
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},
{
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"message": "<trace#219(from:.ROVP1 > .pin2 to:.U1 > .ovp) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_10",
"source_port_39"
],
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},
{
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"message": "<trace#220(from:.U1 > .ovp to:.ROVP2 > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
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"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
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],
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"source_net_0"
],
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},
{
"type": "source_unnamed_trace_warning",
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"message": "<trace#221(from:.ROVP2 > .pin2 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_25",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_13",
"source_port_41"
],
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"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U1 > .temp to .RTEMP > .pin1",
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},
{
"type": "source_unnamed_trace_warning",
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"message": "<trace#222(from:.U1 > .temp to:.RTEMP > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_26",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_42"
],
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"source_net_0"
],
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},
{
"type": "source_unnamed_trace_warning",
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"message": "<trace#223(from:.RTEMP > .pin2 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_27",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_6",
"source_port_43"
],
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},
{
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"message": "<trace#224(from:.U1 > .fault to:.RFAULT > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_28",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_44"
],
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"source_net_0"
],
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},
{
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"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_29",
"message": "<trace#225(from:.RFAULT > .pin2 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_29",
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"warning_type": "source_unnamed_trace_warning"
},
{
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"source_port_4",
"source_port_45"
],
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},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_30",
"message": "<trace#226(from:.U1 > .adim to:.RADIM > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_30",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_46",
"source_port_3"
],
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},
{
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"message": "<trace#227(from:.RADIM > .pin2 to:.U1 > .vcc) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_31",
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"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_5",
"source_port_47"
],
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},
{
"type": "source_unnamed_trace_warning",
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"message": "<trace#228(from:.U1 > .en to:.REN > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_32",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_48",
"source_port_3"
],
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},
{
"type": "source_unnamed_trace_warning",
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"message": "<trace#229(from:.REN > .pin2 to:.U1 > .vcc) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_33",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
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"y": 0.7
},
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"side_of_component": "left",
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},
{
"type": "schematic_port",
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"y": 0.49999999999999994
},
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"side_of_component": "left",
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},
{
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"center": {
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"y": 0.29999999999999993
},
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"side_of_component": "left",
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"display_pin_label": "vin",
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},
{
"type": "schematic_port",
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"center": {
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"y": 0.09999999999999987
},
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"side_of_component": "left",
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"true_ccw_index": 3,
"display_pin_label": "vcc",
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},
{
"type": "schematic_port",
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"center": {
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"y": -0.10000000000000009
},
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"side_of_component": "left",
"pin_number": 5,
"true_ccw_index": 4,
"display_pin_label": "adim",
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},
{
"type": "schematic_port",
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"center": {
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"y": -0.30000000000000004
},
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"side_of_component": "left",
"pin_number": 6,
"true_ccw_index": 5,
"display_pin_label": "en",
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},
{
"type": "schematic_port",
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"center": {
"x": -1.3000000000000003,
"y": -0.5
},
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"side_of_component": "left",
"pin_number": 7,
"true_ccw_index": 6,
"display_pin_label": "fault",
"is_connected": false
},
{
"type": "schematic_port",
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"center": {
"x": -1.3000000000000003,
"y": -0.7
},
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"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 8,
"true_ccw_index": 7,
"display_pin_label": "sw",
"is_connected": false
},
{
"type": "schematic_port",
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"schematic_component_id": null,
"center": {
"x": 1.3000000000000003,
"y": -0.6
},
"source_port_id": "source_port_8",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"side_of_component": "right",
"pin_number": 9,
"true_ccw_index": 8,
"display_pin_label": "csp",
"is_connected": false
},
{
"type": "schematic_port",
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"schematic_component_id": null,
"center": {
"x": 1.3000000000000003,
"y": -0.39999999999999997
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"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_21",
"pcb_trace_id": "source_trace_11__source_net_0_mst2_0",
"x": -2.7729958,
"y": 0.286,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_22",
"pcb_trace_id": "source_trace_11__source_net_0_mst5_0",
"x": -1.868,
"y": 3.555,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_23",
"pcb_trace_id": "source_trace_11__source_net_0_mst5_0",
"x": -1.633,
"y": 2.3030000000000004,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_24",
"pcb_trace_id": "source_trace_11__source_net_0_mst6_0",
"x": 7.941,
"y": 4.512,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_25",
"pcb_trace_id": "source_trace_11__source_net_0_mst6_0",
"x": 5.778,
"y": 7.092,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_26",
"pcb_trace_id": "source_trace_11__source_net_0_mst7_0",
"x": -1.791,
"y": -2.807,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_27",
"pcb_trace_id": "source_trace_11__source_net_0_mst7_0",
"x": 0.452,
"y": -4.412,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_28",
"pcb_trace_id": "source_trace_11__source_net_0_mst10_0",
"x": 7.474064880259816,
"y": -2.5119984394693065,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_29",
"pcb_trace_id": "source_trace_11__source_net_0_mst10_0",
"x": 7.44400000316876,
"y": -6.48642338672705,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_30",
"pcb_trace_id": "source_trace_8__source_trace_10_mst1_0",
"x": 3.214,
"y": 1.516,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_31",
"pcb_trace_id": "source_trace_8__source_trace_10_mst1_0",
"x": 3.3860714477429017,
"y": -0.5450709080360485,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_32",
"pcb_trace_id": "source_trace_5__source_trace_6__source_trace_22_mst1_0",
"x": -7.34,
"y": 6.006,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_33",
"pcb_trace_id": "source_trace_5__source_trace_6__source_trace_22_mst1_0",
"x": -0.492,
"y": -9.798,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_34",
"pcb_trace_id": "source_trace_5__source_trace_6__source_trace_22_mst1_0",
"x": 9.222,
"y": -8.734,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_35",
"pcb_trace_id": "source_trace_5__source_trace_6__source_trace_22_mst1_0",
"x": 6.228,
"y": 2.243,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_36",
"pcb_trace_id": "source_trace_5__source_trace_6__source_trace_22_mst2_0",
"x": -8.602,
"y": -4.072,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_37",
"pcb_trace_id": "source_trace_5__source_trace_6__source_trace_22_mst2_0",
"x": -5.187,
"y": 5.435,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_38",
"pcb_trace_id": "source_trace_0__source_trace_1_mst1_0",
"x": -9.04,
"y": 4.063,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "bottom",
"to_layer": "top",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_39",
"pcb_trace_id": "source_trace_0__source_trace_1_mst1_0",
"x": -2.356,
"y": -3.565,
"hole_diameter": 0.2,
"outer_diameter": 0.3,
"layers": [
"top",
"bottom"
],
"from_layer": "top",
"to_layer": "bottom",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "pcb_footprint_overlap_error",
"pcb_error_id": "pcb_footprint_overlap_pcb_smtpad_16_pcb_smtpad_38",
"error_type": "pcb_footprint_overlap_error",
"message": "pcb_smtpad CIN.pin2 overlaps with pcb_smtpad ROVP1.pin2",
"pcb_smtpad_ids": [
"pcb_smtpad_16",
"pcb_smtpad_38"
],
"pcb_footprint_overlap_error_id": "pcb_footprint_overlap_error_0"
},
{
"type": "pcb_footprint_overlap_error",
"pcb_error_id": "pcb_footprint_overlap_pcb_smtpad_20_pcb_smtpad_45",
"error_type": "pcb_footprint_overlap_error",
"message": "pcb_smtpad D1.pin2 overlaps with pcb_smtpad RADIM.pin1",
"pcb_smtpad_ids": [
"pcb_smtpad_20",
"pcb_smtpad_45"
],
"pcb_footprint_overlap_error_id": "pcb_footprint_overlap_error_1"
},
{
"type": "pcb_footprint_overlap_error",
"pcb_error_id": "pcb_footprint_overlap_pcb_smtpad_20_pcb_smtpad_46",
"error_type": "pcb_footprint_overlap_error",
"message": "pcb_smtpad D1.pin2 overlaps with pcb_smtpad RADIM.pin2",
"pcb_smtpad_ids": [
"pcb_smtpad_20",
"pcb_smtpad_46"
],
"pcb_footprint_overlap_error_id": "pcb_footprint_overlap_error_2"
},
{
"type": "pcb_footprint_overlap_error",
"pcb_error_id": "pcb_footprint_overlap_pcb_courtyard_rect_2_pcb_hole_0",
"error_type": "pcb_footprint_overlap_error",
"message": "pcb_courtyard_rect [pcb_courtyard_rect_2] overlaps with pcb_hole [pcb_hole_0]",
"pcb_hole_ids": [
"pcb_hole_0"
],
"pcb_footprint_overlap_error_id": "pcb_footprint_overlap_error_3"
},
{
"type": "pcb_pad_pad_clearance_error",
"pcb_pad_pad_clearance_error_id": "pcb_pad_pad_clearance_error_0",
"error_type": "pcb_pad_pad_clearance_error",
"message": "Pads pcb_port[.CIN > .pin2] and pcb_port[.ROVP1 > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)",
"pcb_pad_ids": [
"pcb_smtpad_16",
"pcb_smtpad_38"
],
"minimum_clearance": 0.1,
"actual_clearance": 0,
"center": {
"x": -2.631,
"y": 4.909
}
},
{
"type": "pcb_pad_pad_clearance_error",
"pcb_pad_pad_clearance_error_id": "pcb_pad_pad_clearance_error_1",
"error_type": "pcb_pad_pad_clearance_error",
"message": "Pads pcb_port[.D1 > .pin2] and pcb_port[.RADIM > .pin1] are too close (clearance: 0mm, minimum: 0.1mm)",
"pcb_pad_ids": [
"pcb_smtpad_20",
"pcb_smtpad_45"
],
"minimum_clearance": 0.1,
"actual_clearance": 0,
"center": {
"x": -4.71875,
"y": -4.9575
}
},
{
"type": "pcb_pad_pad_clearance_error",
"pcb_pad_pad_clearance_error_id": "pcb_pad_pad_clearance_error_2",
"error_type": "pcb_pad_pad_clearance_error",
"message": "Pads pcb_port[.D1 > .pin2] and pcb_port[.RADIM > .pin2] are too close (clearance: 0mm, minimum: 0.1mm)",
"pcb_pad_ids": [
"pcb_smtpad_20",
"pcb_smtpad_46"
],
"minimum_clearance": 0.1,
"actual_clearance": 0,
"center": {
"x": -3.8062500000000004,
"y": -4.9575
}
},
{
"type": "pcb_courtyard_overlap_error",
"pcb_error_id": "pcb_courtyard_overlap_pcb_component_1_pcb_component_14",
"error_type": "pcb_courtyard_overlap_error",
"message": "Courtyard of CIN overlaps with courtyard of ROVP1",
"pcb_component_ids": [
"pcb_component_1",
"pcb_component_14"
],
"pcb_courtyard_overlap_error_id": "pcb_courtyard_overlap_error_0"
},
{
"type": "pcb_courtyard_overlap_error",
"pcb_error_id": "pcb_courtyard_overlap_pcb_component_3_pcb_component_18",
"error_type": "pcb_courtyard_overlap_error",
"message": "Courtyard of D1 overlaps with courtyard of RADIM",
"pcb_component_ids": [
"pcb_component_3",
"pcb_component_18"
],
"pcb_courtyard_overlap_error_id": "pcb_courtyard_overlap_error_1"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_0",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on U1 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_0",
"source_port_ids": [
"source_port_0",
"source_port_1",
"source_port_2",
"source_port_3",
"source_port_4",
"source_port_5",
"source_port_6",
"source_port_7",
"source_port_8",
"source_port_9",
"source_port_10",
"source_port_11",
"source_port_12",
"source_port_13",
"source_port_14"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_1",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on VIN_PAD are underspecified (no pinAttributes set)",
"source_component_id": "source_component_6",
"source_port_ids": [
"source_port_25"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_2",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on GND_PAD are underspecified (no pinAttributes set)",
"source_component_id": "source_component_7",
"source_port_ids": [
"source_port_26"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_3",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on LED_OUT are underspecified (no pinAttributes set)",
"source_component_id": "source_component_8",
"source_port_ids": [
"source_port_27"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_4",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on LED_GND are underspecified (no pinAttributes set)",
"source_component_id": "source_component_9",
"source_port_ids": [
"source_port_28"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_0",
"warning_type": "source_no_power_pin_defined_warning",
"message": "U1 has no pin with requires_power=true",
"source_component_id": "source_component_0",
"source_port_ids": [
"source_port_0",
"source_port_1",
"source_port_2",
"source_port_3",
"source_port_4",
"source_port_5",
"source_port_6",
"source_port_7",
"source_port_8",
"source_port_9",
"source_port_10",
"source_port_11",
"source_port_12",
"source_port_13",
"source_port_14"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_1",
"warning_type": "source_no_power_pin_defined_warning",
"message": "VIN_PAD has no pin with requires_power=true",
"source_component_id": "source_component_6",
"source_port_ids": [
"source_port_25"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_2",
"warning_type": "source_no_power_pin_defined_warning",
"message": "GND_PAD has no pin with requires_power=true",
"source_component_id": "source_component_7",
"source_port_ids": [
"source_port_26"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_3",
"warning_type": "source_no_power_pin_defined_warning",
"message": "LED_OUT has no pin with requires_power=true",
"source_component_id": "source_component_8",
"source_port_ids": [
"source_port_27"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_4",
"warning_type": "source_no_power_pin_defined_warning",
"message": "LED_GND has no pin with requires_power=true",
"source_component_id": "source_component_9",
"source_port_ids": [
"source_port_28"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_0",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "U1 has no pin with requires_ground=true",
"source_component_id": "source_component_0",
"source_port_ids": [
"source_port_0",
"source_port_1",
"source_port_2",
"source_port_3",
"source_port_4",
"source_port_5",
"source_port_6",
"source_port_7",
"source_port_8",
"source_port_9",
"source_port_10",
"source_port_11",
"source_port_12",
"source_port_13",
"source_port_14"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_1",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "VIN_PAD has no pin with requires_ground=true",
"source_component_id": "source_component_6",
"source_port_ids": [
"source_port_25"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_2",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "GND_PAD has no pin with requires_ground=true",
"source_component_id": "source_component_7",
"source_port_ids": [
"source_port_26"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_3",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "LED_OUT has no pin with requires_ground=true",
"source_component_id": "source_component_8",
"source_port_ids": [
"source_port_27"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_4",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "LED_GND has no pin with requires_ground=true",
"source_component_id": "source_component_9",
"source_port_ids": [
"source_port_28"
],
"subcircuit_id": "subcircuit_source_group_0"
}
]