jettos/powercore16-revc-complete-board-model

This code defines the hardware layout for a power distribution and control circuit featuring high-current power inputs, multiple output switches with programmable fuses, MCU-based control, input connectors, and communication interfaces, all represented with specific component footprints and connectivity zones.

Version
0.4.8
License
unset
Stars
0

src/components/ProgrammableFuseChannel.tsx

export function ProgrammableFuseChannel({ n, x, y }: { n: number, x: number, y: number }) {
  return <>
    <chip name={`EFUSE_OUT${n}`} footprint="soic8_p1.27mm" pcbX={x} pcbY={y} />
    <resistor name={`R_EFUSE_OUT${n}_CFG`} resistance="0" footprint="0603" pcbX={x - 7} pcbY={y + 4} />
    <silkscreentext text={`EFUSE_OUT${n}: OUT${n}_IS -> MCU trip logic -> CAN fault`} pcbX={x} pcbY={y + 8} fontSize="0.62mm" />
    <silkscreentext text={`OUT${n}_EN configurable threshold/delay retry-latch`} pcbX={x} pcbY={y - 4} fontSize="0.58mm" />
  </>
}