jettos/powercore16-revc-complete-board-model

This code defines the hardware layout for a power distribution and control circuit featuring high-current power inputs, multiple output switches with programmable fuses, MCU-based control, input connectors, and communication interfaces, all represented with specific component footprints and connectivity zones.

Version: 0.4.8
License: unset
Stars: 0

src/components/CanInterface.tsx

export function CanInterface() {
  return <>
    <chip name="U_CAN_TRANSCEIVER" footprint="soic8_p1.27mm" pcbX={82} pcbY={8} />
    <diode name="D_CAN_ESD" footprint="soic8_p1.27mm" pcbX={96} pcbY={8} />
    <chip name="L_CAN_CMC_DNI" footprint="soic8_p1.27mm" pcbX={96} pcbY={-6} />
    <resistor name="R_CAN_TERM_DNI" resistance="120" footprint="0603" pcbX={82} pcbY={-8} />
    <testpoint name="TP_CAN_H" pcbX={104} pcbY={10} />
    <testpoint name="TP_CAN_L" pcbX={104} pcbY={4} />
    <silkscreentext text="CAN_H CAN_L CAN_REF_GND IGN_WAKE_IN SERVICE_WAKE BOOT_SERVICE MODULE_FAULT_OUT" pcbX={78} pcbY={18} fontSize="0.62mm" />
    <silkscreentext text="CAN transceiver, ESD, optional CMC/termination DNI near J_DASH_16" pcbX={80} pcbY={-20} fontSize="0.85mm" />
  </>
}