jettos/powercore16-revc-complete-board-model

This code defines the hardware layout for a power distribution and control circuit featuring high-current power inputs, multiple output switches with programmable fuses, MCU-based control, input connectors, and communication interfaces, all represented with specific component footprints and connectivity zones.

Version: 0.4.8
License: unset
Stars: 0

src/components/BoardZones.tsx

export function BoardZones() {
  return <>
    <chip name="ZONE_MAIN_POWER_INPUT_SIDE" footprint="soic8_p1.27mm" pcbX={-108} pcbY={0} />
    <chip name="ZONE_HIGH_CURRENT_OUTPUTS" footprint="soic8_p1.27mm" pcbX={0} pcbY={48} />
    <chip name="ZONE_LOW_CURRENT_LOGIC" footprint="soic8_p1.27mm" pcbX={20} pcbY={-12} />
    <chip name="ZONE_INPUT_PROTECTION" footprint="soic8_p1.27mm" pcbX={0} pcbY={-52} />
    <chip name="ZONE_CAN_DASH_SERVICE" footprint="soic8_p1.27mm" pcbX={104} pcbY={0} />
    <chip name="VBAT_PROTECTED_BUS_COPPER_REGION" footprint="soic8_p1.27mm" pcbX={-12} pcbY={53} />
    <chip name="PWR_GND_PLANE_REGION" footprint="soic8_p1.27mm" pcbX={-8} pcbY={-4} />
    <chip name="OUT1_OUT4_HIGH_CURRENT_COPPER_REGION" footprint="soic8_p1.27mm" pcbX={-64} pcbY={48} />
    <chip name="OUT5_OUT16_MEDIUM_CURRENT_ROUTING_REGIONS" footprint="soic8_p1.27mm" pcbX={40} pcbY={48} />
    <chip name="LOW_CURRENT_CONTROL_SENSE_ROUTE_REGION" footprint="soic8_p1.27mm" pcbX={38} pcbY={-24} />
    <silkscreentext text="HIGH CURRENT ZONE: VBAT bus, smart switches, output connectors" pcbX={0} pcbY={58} fontSize="1mm" />
    <silkscreentext text="LOW CURRENT LOGIC ZONE: MCU, CAN, inputs, supplies" pcbX={30} pcbY={-28} fontSize="1mm" />
    <silkscreentext text="CAN path near J_DASH_16" pcbX={91} pcbY={-18} fontSize="0.85mm" />
    <silkscreentext text="Input routing/protection near J_IN_A/J_IN_B" pcbX={0} pcbY={-62} fontSize="0.85mm" />
  </>
}