astra-abse/t113-s3
Allwinner T113-S3 / JLCPCB C5197687: native saved fanout, LCD top, storage right, 127 perimeter exits, 30 decoupling capacitors, connected GND planes; clean DRC and shorts, all 29 vias connected.
- Version
- 1.2.0
- License
- MIT
- Stars
- 0
reports/verification.json
{
"status": "PASS",
"started": "2026-09-10T06:43:09.240Z",
"completed": "2026-09-10T06:45:35.123Z",
"artifact": "dist/index/circuit.json",
"circuitSha256": "b876a51b8f83466df875d3097530cf6675b6971b79d328bab5364cabda9b9e8d",
"sha256": "5be1ec686fc1bb9df5b05d5befec58fa92b78ec1976394ba17a0ccb90ccd40e2",
"runtime": "1.3.14",
"versions": {
"tscircuit": "0.0.2495",
"@tscircuit/core": "0.0.1884",
"@tscircuit/checks": "0.0.188",
"@tscircuit/cli": "0.1.2050"
},
"routingSource": {
"mode": "native_saved_fanout",
"reference": "astra/f1c100s@0.9.2",
"paths": 188,
"checkedFiles": [
"src/saved-fanout.ts",
"src/pins.ts",
"src/T113S3Module.tsx",
"src/routing-profile.ts",
"src/decoupling.tsx",
"src/index.ts",
"src/terminals.ts",
"src/decoupling-layout.json",
"imports/T113_S3.tsx",
"imports/provenance.json"
]
},
"coverage": {
"pads": 189,
"escapes": 127,
"internalFanoutJoins": 61,
"intentionallyUnconnectedPins": [
106
],
"lcdSignalsTop": 22,
"storageSignalsRight": 12,
"traces": 188,
"vias": 29
},
"connectivity": {
"capacitors": 30,
"connectedGroundPads": 32,
"connectedVias": 29,
"groundPours": 2
},
"drc": {
"errors": 0,
"warnings": 0,
"ignoredChecks": []
},
"clearance": {
"minimumRequiredMm": 0.1,
"minimumMeasuredMm": 0.11479599999999848,
"pairsChecked": 237846,
"violations": []
},
"shorts": {
"gerber": 0,
"pcb": 0,
"layers": "all",
"pixelsPerMm": 100
},
"commands": [
{
"command": "bun scripts/patch-cli-bitmap.ts",
"exitCode": 0,
"log": "reports/bitmap-compatibility.log"
},
{
"command": "node_modules/.bin/tsc --noEmit",
"exitCode": 0,
"log": "reports/typecheck.log"
},
{
"command": "node_modules/.bin/tsci build index.circuit.tsx --disable-parts-engine --pcb-svgs --schematic-svgs",
"exitCode": 0,
"log": "reports/build.log"
},
{
"command": "bun test",
"exitCode": 0,
"log": "reports/tests.log"
},
{
"command": "node_modules/.bin/tsci check dist/index/circuit.json",
"exitCode": 0,
"log": "reports/check.log"
},
{
"command": "node_modules/.bin/tsci check netlist index.circuit.tsx",
"exitCode": 0,
"log": "reports/check-netlist.log"
},
{
"command": "node_modules/.bin/tsci check pin_specification dist/index/circuit.json",
"exitCode": 0,
"log": "reports/check-pin_specification.log"
},
{
"command": "node_modules/.bin/tsci check placement dist/index/circuit.json",
"exitCode": 0,
"log": "reports/check-placement.log"
},
{
"command": "node_modules/.bin/tsci check source dist/index/circuit.json",
"exitCode": 0,
"log": "reports/check-source.log"
},
{
"command": "bun scripts/test-bitmap-renderer.ts",
"exitCode": 0,
"log": "reports/bitmap-regression.log"
},
{
"command": "node_modules/.bin/tsci check shorts dist/index/circuit.json --mode gerber --layer all --pixels-per-mm 100",
"exitCode": 0,
"log": "reports/shorts-gerber.log"
},
{
"command": "node_modules/.bin/tsci check shorts dist/index/circuit.json --mode pcb --layer all --pixels-per-mm 100",
"exitCode": 0,
"log": "reports/shorts-pcb.log"
}
]
}