abse/boostxl-uln2003

This code defines a React component that models a through-hole or surface-mount LED with specified pin labels, footprint, silkscreen, and 3D CAD model for PCB layout.

Version
1.0.5
License
unset
Stars
0

docs/order-readiness.md

# First-article release review

## Verdict

**Approved for a small, current-limited first-article prototype order only.** This is a motor-power board; do not connect a motor or apply full load until the staged bench checks below pass.

## Closed release gates

- The netlist, values, DNP choices, and S1/S2 truth-table mapping are checked against SLCU002 Figure 26.
- Production parts and passives carry JLCPCB/LCSC identifiers; the discontinued flyback diodes use documented SS24FL replacements.
- All eight motor outputs are explicit named routes constrained to 0.50 mm; the release audit requires every output to remain at least 0.30 mm end-to-end.
- Four copper layers, 0.30/0.45 mm via limits, no jumpers, zero generated errors, and passing top/bottom PCB short scans.
- A meaningful one-sheet schematic and switch-slot routing keepouts are present without explicit `<netlabel>` components.

## Mandatory first-article gates

1. Print the provisional 56 × 60 mm fabrication output at 1:1 and check LaunchPad sockets, both 1×6 motor sockets, J9, S1/S2 actuator direction, mounting slots, and board clearance against physical parts. TI's legacy production archive is no longer exposed in Resource Explorer.
2. Inspect all four copper layers, drills/slots, mask, paste, silkscreen, BOM, CPL, diode polarity, and switch rotation in the board-house viewer.
3. Order 2–5 boards. With no motor installed, begin at 5 V and a 100 mA current limit; verify logic, both modes, all eight outputs, ground link, OR-ing, and clamp behavior.
4. Add a resistive load, then ramp one channel at a time while measuring trace/via and package temperature. Only after that review should motor voltage/current be increased; verify flyback transients and simultaneous-channel dissipation.

The routed output width improves first-article margin but does not replace a load-specific thermal calculation or bench validation.