ShiboSoftwareDev/nema8-20mm-pd-mini-controller
A 20 mm four-layer USB‑C PD 9 V NEMA8 stepper-driver board using CH224K power negotiation/protection and a TMC2209 with current sensing, motor connector, and STEP/DIR/UART control test points.
- Version
- 1.0.2
- License
- unset
- Stars
- 0
checks/check-shorts/pcb.svg
PCB
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wFi4gFi4kFiYUFioYFiYkFiogFbVwFiYkFiYgFh4gFh4cFiIoFiYkFUm4F0mYFkIcFkYcFw1IFjYcFj4gFjIcFjYgFjIYFjIcFmDoFi4kFi4kFioUFi4UFiokFiokFbDwFiYcFiogFh4cFiYgFiIgFiIkFR1sFhYgFhYcFJ2sFg4oFg4oFP40FhY0FhIsFMqcFho4FhY0FQ7gFio0FiYwFho8Fh5AFio0FiYwFZc0Fio4Fio4FipAFiZAFjI4Fio4Fjs0Fi4wFi4sFjZMFjZIFi4wFi4sFr80Fi4wFjIwFkJAFkJEFi4wFjIsF2sYFkY4Fko8FmI8FaZ8FiI4Fh40FUrwFiY0FiI4FiY8FiI8Fio4FiY4FeMsFi40Fi4wFipIFi5IFi4wFi4wFjpIFjZIFjIsFjI0Fu9IFjo4FjY4Fj44Fj44Fjo0Fjo0F0KsFkYwFkY0F15gFkIsFkYwF7YQFDvlI+Fr4mBWVnQV8xwVwqwVfoAVIkwVHgwVTdAVnagV+XwWYYAWvaQXDdAXMhAXMmgW8qgVf/BoVi4oFZ0IFgX4FfIIFeYgFeo8FfZUFgpkFiJsFj5sFr9QFtuoFwPcXBYuLBYuMBZKcBT55BYOKBYKLBTuUBYWNBYWMBUWoBYSPBYSQBVm6BYqNBYmMBYiQBYeQBYuOBYqNBXfNBYqOBYqOBYyQBYqQBYyOBYyPBZ/NBYyNBYuNBY+QBY6QBY2NBYyNBb26BZKPBZKQBdGnBZGMBZGNBduVBZGKBZGMBduBBZKJBZKJBcdvBYyKBYyLBZGGBZGHBYuKBYyKBbNcBYyKBYyKBY6FBY6FBYuJBYyKBZ83BYuFBYyEBYqJBYuJBYmFBYmGBYqHBUH7SAVW+xgFi4oFiooFXysFDvlI9y/3yxX4OvtDBZqBBZR9BY57BYd7BYF9BXyCBXqJBXqOBfyY92oFhI8FhY8FiowFiowFh5EFh5EFi4wFiosFipMFiZIFi4wFi4wFjZIFjJIFjIwFi4wFj5EFj5EFjIwFjIsFkY8Fko8F+Jj3agWcjwWciAWaggWVfgWPewWIegWCfQV8ggUO+Ui2+GkV+JiLBZyIBZqCBZV9BY57BYh7BYF9BXyCBXqIBfyYiwV6jgV8lAWBmQWImwWOmwWVmQWalAWc+4gV+JiLBZyIBZqCBZV9BY57BYh7BYF9BXyCBXqIBfyYiwV6jgV8lAWBmQWImwWOmwWVmQWalAUO+Uj44/fpFYyKBY+FBY+FBYuKBYyKBYyEBY2EBYuKBYuKBYmEBYqDBYqLBYuKBYeFBYeFBYqKBYqKBYWHBYSHBfyY+2oFeogFeo0FfJQFgZkFh5sFjpsFlJkFmpUF+Dv3QwX8O/dDBXyUBYKZBYicBY+bBZWYBZqUBZyOBZyHBfiY+2oFkocFkYcFDvlI+Ev3kxWGigX7q4sFi4sFLPtyBYF9BX2CBXqIBXmOBX2UBYGYBYecBY6bBfek+REFkJIFkJIFi4sFi4sFko8FkpAFi4sFjIsFk40Fk40FjIsFi4sFk4kFlIoFi4sFi4sFkoYFkocFjIsFi4sFkIQFj4QF97r9EQWPewWIegWBfgV9gQV6iAV5jgV9lAWBmAX7IvfIFfsB94AFJvuABQ75SPe++GUV2bYFlMsFTL8F+weeBSmGBYv7VgX32vxEFYSJBYmLBYmLBfv7hwWKiwWLiwWDjAWCjQWLiwWLiwWEjwWEkAWKiwWLiwWGkgWHkQWLjAWKiwWKkwWJkgWLjAWLiwWL+QoFjJIFjZIFi4wFi4wFkJEFjpEFjIwFjIwFkY8FkY8FjYsFjIwFkowFk40F9yWTBZCKBZCLBfcZdQWOigWPigWQiQWQiQWNiQWOiQXlQQWNiAWPiQWNhwWOhwWMhwWNiAWLhgWMhwWLhwWLhwV9+wAFiokFi4gFiIYFiYYFiYkFiogFh4cFh4cFiIoFiYkFSGYF9wJmBY6JBY+KBY+IBY+JBY2IBY6IBdE3BY6GBY6FBYyJBYuKBYyEBYyEBYX7AAWLiQWLiQWJhQWJhQWKiQWKiQVsWwWIiQWKiAWHiAWHhwWIigWIiQU+ZAWJigWJigVu3BXEqAWeqAWP3QVYyQX7JLsF+1CWBYv7nAUO+Uj4ZPclFaDbBZOZBZiXBZuQBZ2KBZuEBZd/BZF7BYp7BXIwBYqIBYqHBYiHBYmHBYiIBYmIBUNLBYiJBYmJBYaJBYaIBYiLBYiJBSl1BYuLBYuLBYOLBYKLBYuLBYuLBfsEnAWJiwWKjAWEjQWEjgWKjAWKiwVRsQWFkQWFkQVU3QWLiwWLiwWIkwWIkgWLiwWLiwVm918Fi5MFi5MFuvdeBYyMBYuNBY+RBY2RBY2MBYyNBc7XBYyMBYuLBZGQBZKQBYuLBYuLBdGsBZKNBZKOBdqVBYyLBYyLBZOKBZKLBYyKBY2LBfVqBYyLBYyLBZKHBZGHBYyLBYyKBcNZBYyLBYuKBZCFBY+FBYyKBYuLBapEBY57BYh7BYF9BXyCBXqIBXqOBXyVBYGYBXDJBWKwBTSlBU6EBVVxBVRNBWD7TAWt+04FuUgFtG8F6H0F2JwFDvlI93uVFYaKBfs1iAWLiwWKiwWDjAWDjQWKiwWLiwWEjwWEjwWLjAWKiwWHkgWGkQWLjAWLiwWJkwWJkgWMjAWKiwWT+QQFjJAFi5EFjY0Fi48Fj48FjY8FjY4FjY0FkI4Fj44Fjo0FjowFkIwFkY0F7pgFj4sFjowF14kFkYoFkIsF9xBrBYuLBYuLBZOHBZKIBYyLBYuKBeZIBYyKBYuLBZCFBZGFBYuLBYuKBb8wBY2FBY6GBaAsBYuHBYyHBY1EBYqHBYuIBYJOBYmHBYqHBXhXBYeFBYmGBUw8BYWGBYWGBTdZBYWJBYWIBfsdaAV53hX3EasF0rUFwM4Fm7UFlMAFicsFeOAFXtoFPsQF+wGnBUiMBVGDBYX8tAUO+Uj3EeUV+CGLBZyIBZqCBZV9BY57BYh7BYF9BXyCBXqIBfxOiwV6jgV8lAWCmQWHmwWL99MFi/fSBY+bBZSZBZqUBZyPBfhOiwWchwWaggWVfQWOewWIewWBfQV8ggV6iAX8IYsFi/t+BfeciwWdiAWZggWVfQWOewWIegWBfgV9ggV5hwX7nIsFDvlI9xf32hWL+6oFiHsFgX0FfYIFeYgFeo4FfZQFgZkFh5sFi/kRBY+bBZWZBZmUBZyPBZ2HBYyKBfgviwWciAWZggWVfQWPewWHewWBfQV9ggV6iAX8FYsFi/t4BffQiwWdiAWZggWVfQWOewWIewWBfQV9ggV5hwUO+Uj4fve0Ffs1iwV6jwV9lAWBmQWImwWOmwWVmQWZlAWdjgX3bIsFj4oFkIsFj4kFj4oFj4kFj4kFjogFj4kFjYgFjocFjYgFjYcFjIcFjYcFi4cFjIcFiocFi4cFXvtaBYqJBYuIBYiGBYiGBYmJBYqJBUtGBYmKBYqJBYWIBYaHBYmKBYmKBTpwBYqLBYuKBYOKBYOKBYqLBYqLBTWSBYSNBYSNBTmuBYWOBYaOBUfCBYaQBYaQBV/QBYuMBYqMBYmRBYiSBYuMBYuMBXf3UgWLkQWLkgWx90IFjIwFi40FjpEFjpEFjIwFjI0FzdsFjIwFi4wFkZAFkY8FjIwFjIsF37QFi4sFi4sFk40Fk44Fi4sFi4sF9xeVBZKKBZGLBfcQcQWbhQWXfwWRfAWLegWEfAV+gAV7hQV5iwX7CKMF+weCBUhrBVZJBWj7MwWe+0IFrlUFxFwF0W4Fz4UFx6AFvL8FDvlI+H74OhWL95sFj5sFlJkFmpQFnI8FnIcFmoIFlX0FjnsFi/0RBYh7BYF9BXyCBXqIBXqOBXyUBYKZBYebBYv3tgX8DosFi/u2BYd7BYJ9BXyCBXqIBXqOBXyUBYGZBYibBYv34AWL98UFjpsFlZkFmpQFnI8FnIcFmoIFlH0Fj3sFi/ubBQ75SPfu+UEVi/0RBYh7BYF9BXyCBXqIBXqOBXyUBYGZBYibBYv5EQWOmwWVmQWalAWcjwWchwWaggWVfQUO+Ui/9z4Vio4Fia8FjpsFlJkFmZUFnY4FnIkFmoIFlX4Fj3sFjGsFkXIFlXYFmXkFnX0FunoFzoQFu5EFwp8FoJkFnJ0Fl6EFk70FivhxBY6bBZWZBZqUBZyPBZyHBZqCBZR+BY96BYz8dAWKiAWLiAWCTgWJhQWJhAV5awWHhgWIhwVycQWHiAWIiAVtdwWGiQWGiAVKcwWGigWFigVRhAWGiwWGiwU8kwWFjAWFjAVRoQWFjwWFjQVvoQWHjwWHjgV2pQWJkAWIjwV+qAWKkAWJjwWEqwUO+Uj3Uff3FfsBOQWL+3UFiHsFgX0FfYIFeYgFeo4FfZQFgZkFh5sFi/kRBY+bBZWZBZmUBZyPBZ2HBZmCBZV9BY57BYv7xAX4Hve7BZuSBZyNBZyGBZiABZR8BYx7BYZ7BX9/Bfui+14F9+b70AWVfQWPewWHewWCfQV8ggV6iAV6jgV8lAUO+Uj3DOUV+CuLBZyIBZmCBZV9BY97BYd7BYF9BX2CBXqIBfxYiwV6jgV9lAWBmQWHmwWL+REFj5sFlZkFmZQFnI8FnYcFmYIFlX0FjnsFDvlI+KH5WxWOjwWNjQWNjQWRjQWPjgWOjAWOjAWRjAWRjAWOigWOiwWQiQWRigWNigWOigWQhwWPiAWNiQWNiQWOhgWOhgWMiQWMiAWLhgWNhQWL/REFh3sFgX0FfYIFeogFeY4FfZQFgZkFiJsFi/h1BftD+6wFiYkFiokFhocFh4cFiYkFiYoFhYkFhYgFiYsFiIoFhYwFhYoFiIwFiYsFhY4FhY0FiYwFiY0Fh48Fho8Fio0FiY0F+0P3rAWL/HUFiHsFgX0FfYIFeYgFeo4FfZQFgZkFh5sFi/kRBY2RBYuQBYyOBYyNBY6QBY6QBY2NBY2NBY+OBZCPBY6MBY2MBZGMBZCNBY6LBY6MBZGKBZGKBY6KBY6KBY+IBZGJBY2JBY2JBY6HBY+HBfdw+/UF93D39QUO+Uj4e/dPFYT4hgWOmwWVmQWZlAWcjwWdiAWZggWVfQWPewWU/REFioYFi4cFiocFiocFiYgFiYcFiIgFiIcFiIkFiIgFh4kFh4kFh4oFh4oFhosFh4oFhosFh4sFh40Fh4wFh40Fh4wFiI4Fh44FiI4FiI4F/BT4oQWL/IkFh3sFgn0FfIIFeogFeo4FfJQFgZkFiJsFi/kRBYyPBYuPBYyPBYyPBY6PBYyOBY6OBY6PBY6NBY6OBZCNBY+NBY+MBY6NBZCLBZCMBY+KBY+LBY+JBZCKBY+JBY6KBY+IBY+IBY2IBY6IBQ75SPgblBWFiAWJiwWJiwUzgAWKiwWKigWEjAWDjAWKiwWKiwUypQWJjAWIjAWGjgWGjgWJjQWJjAU62gWJjgWIjgWJjwWIjwWLjwWJjgVP96AFi40Fi4wFi5IFi5IFjIwFi40FxPddBY2PBYyPBY6OBY2PBY6NBY6PBdHEBYyMBYyMBZKOBZGOBY2LBYyMBfcOqQWPiwWPjAWQigWPjAWPiQWPiwX3B2cFjIoFjYsFkYcFkYgFjIoFjYkFzkoFjYgFjYkFjocFjYYFjIgFjIgFxfuJBYuDBYuDBW/7LgWIhAWJhQVYMgWKiQWLigWGhgWGhgWKigWKigUwTgWJigWKigUg0BXOkwXUvAW11gWl9x8FVvd1BVm8BTCoBShzBVdgBVj7RgXD+4sFy00FDvlI93j3xxWJigX7AooFi/uVBYd7BYF9BX2CBXqIBXmOBX2UBYGZBYibBYv5BQWMkQWMkgWMjAWLjQWPkQWOkAWNjAWMjQWQjwWRjwWNiwWMjAWSjQWRjAX3HZcFjosFj4sF9w6EBY+KBZCLBdp2BY+KBY+KBa96BZCIBZCIBcRbBYuKBYuLBZCFBZCEBYuLBYyLBaRXBY2EBY2EBZA/BYuJBYuJBYqFBYqFBYqJBYuJBXRcBYqJBYqJBYeHBYeFBYmKBYqKBWhxBYWIBYWIBVN2BYeKBYeJBTp8BYiLBYmLBfsCggWF4BX1kwXWmQW5nAWgmwWZpwWGxAV6sAVesQVxlwVEnQX7BpIFL4MFi/uJBQ75SPiTtRXQOQWTfAWNewWFewWAfwV7gwV6igV6kAV+lQVRzwVUYAWIigWJiQWGiQWGiAWHiwWIigU1fgWJjAWJigWEjAWFiwWJjAWIiwU0qQWJjAWIjAWGjgWGjgWJjgWJjAU75AWKjgWJjQWJkAWIkAWLjgWKjQVQ98MFi4sFi4sFi5MFi5MFi4sFi4wFw/d2BY2OBYyPBY2PBY6PBY2OBY2OBdDLBY2MBYyNBZGOBZGOBY2MBY2MBfcLrAWRjAWRjAWNigWOjAWRiQWRigX3BGMFjYoFjooFj4cFkYgFjIkFjYoFzUEFjIkFjYkFjYYFjoYFjIgFjIkFw/uoBYuEBYuEBW/7QgWJhQWJhQX7K0AVMfUFg5oFipsFkJsFlpcFm5MFnIwFnIYFmIEF0zcFmqkFpfc1BVb3lgVZxAU0qgUucQVXWgVY+2IFwvuvBctDBcx2BcmUBQ75SPfz+EoV3JcFrpgFoJsFlqIFjLMFfbkFgZYFd5gFcZUFQZsF+xSQBfsofgWL+10F90g8FftIhQWL+7cFh3oFgn4FfIEFeogFeo4FfJUFgZgFiJwFi/j8BYyRBYyRBYyNBYuNBY+QBY6RBY2MBYyNBZGOBZCPBY2MBY2MBZGMBZKNBfdUmwWOiwWOjAX3G4UFj4oFj4sF3HoFj4kFj4sFrX0Fj4kFj4kFp3kFj4cFkIgFoHQFi4oFjIsFjoQFj4UFi4oFjIoFnU0FjIUFjIUFiVQFi4sFiYMFiYMFi4sFeWQFiooFi4oFhoUFhoUFiosFi4oFaXAFhIgFhYcFXXoFhooFhokFNX8F94H7rQWTfQWNegWGewV/fwV8gwV5igV6kAV+lgX7nPfLBYOaBQ75SOXBFYaOBYqNBYiNBYmQBYeQBVr3AQWHnAWOmwWVmQWZlAWcjgWdiAWZggWVfgW3KgXNaQX3IIcF7bgFq/AFdsUFS68F+4ezBYiNBYiLBYaNBYaNBYmOBYiMBUu+BYiPBYiOBYmOBYiOBYqQBYmOBXrHBYuPBYqOBYuQBYuPBYyPBYyPBbT3DAWOkAWNkAWNjQWMjQWQjwWPjwXvzAWRjgWQjgWOiwWNjAWRiwWRjAX3R4IFjYoFjIwFkogFkooFjIoFjYoFkIcFkYcFjIoFjIoF1zAFknwFjXoFhXwFgH4Fe4QFeYoFe5AFfpYFTNYF+yOTBUBaBWssBZVoBbZoBfeDYwWTiQWTiAXfWgWQhwWQhwWNiQWMigWOhQWOhgWrNgWLhgWNhwWLhwWLiAWKhgWKhgVi+xgFi4oFiooFh4UFiIQFiosFiooFhYYFhYcFiosFiooF+xJRBYmLBYqKBYSKBYSJBYmLBYmLBfs2jwWJjAWJiwWFjQWEjAWJjAWJjAUzuQUO+Uj3yflsFfeiiwWchwWaggWVfQWOewWIewWBfQV8ggV6iAX7dYsFi/znBYh7BYF9BX2CBXmIBXqOBXyUBYKZBYebBYv45wX7hYsFeo4FfJQFgZkFiJsFjpsFlZkFmpQFnI8FDvlI+HT3hxWQ+E4Fj5sFlZkFmZQFnY4FnIcFmYIFlX0FjnsFhvxQBYqIBYyJBYFHBYqHBYqGBXdYBYmIBYmHBX53BYiHBYiIBW1sBYWHBYaHBVhxBYSJBYSJBU2BBYWLBYSLBTOUBYaNBYWMBUWlBYWPBYWOBVyvBYeQBYWQBWjCBYiRBYiRBXnSBYqPBYqOBYTsBYuNBYuMBYr39wWOmwWVmQWalAWcjwWchwWaggWVfgWOegWM+/UFki8Fm00Fp2EFr28FxXYF14IFu5MFsJ4FoqIFk5cFnLYFDvlI99H3NRX3a/ivBZSZBZqVBZyPBZyIBZqCBZV+BY97BYh6BfuS/REFi4sFi4oFhoUFh4QFi4sFiooFhIcFhYYFiosFi4sFg4kFg4oFiosFi4sFg4wFgowFi4wFiosFhI8FhI8Fi4sFi4wFhpEFhpEFi4wFi4sF+7j5EgWHmwWOmwWVmQWZlAWcjwWciAWaggWVfQUO+Uj4dvdYFdf4gwWQmwWXlwWbkgWcjAWchgWYgAWTfAWMegUq/REFiYcFioYFiYgFiocFiIgFiIcFiIkFiIgFh4kFh4kFh4oFh4kFh4sFhooFh4sFh4sFho0Fh4sFh40Fh40FiI4Fh40FiI4FiI4FiY8FiI4F+0b3/wX7Ofv2BYiHBYiGBYmJBYmJBYaIBYeHBYiKBYiKBYaKBYWJBYiLBYiLBYWMBYaLBYiNBYiLBYaOBYaOBYmNBYiNBYiPBYiPBYqOBYmOBYqQBYmQBTv5CQWNnAWTmQWYlgWckAWcigWbhAWWfgWRewXH/G8F9x/3vgWPkAWPkQWMjAWMjAWRjwWRjwWNiwWMjAWSjAWSjQWNiwWMiwWSiQWTigWMiwWMigWRhwWSiAWMigWMigWPhQWPhQUO+Uj3/Pf/FfeZ+7QFlH0FjXsFhnsFgH4FfIMFeYkFeo8FfpYF+5D3qQX7kPupBX6ABXqHBXmNBXyTBYCYBYabBY2bBZSZBfeZ97QF+5/3uwWCmQWJnAWQmwWWlwWalAWdjAWchwWYgQX3lvuxBfeW97EFmZUFm48FnYoFmoIFln8FkHsFiXoFgn0FDvlI9+j4EhWV++EFiHsFgn0FfYEFeogFeY0FfJQFgZkFh5sFgffjBfud96cFgpkFiJsFj5sFlpkFmpMFnI4FnIcFmYEF94n7kQX3k/eQBZqVBZyPBZyIBZqCBZV+BY96BYh7BYJ9BQ75SPci5RX4KosFnYgFmYIFlX0FjnsFiHsFgX0FfYIFeYgF/IKLBYWMBYaLBYiMBYeMBYeOBYaNBYmNBYiNBYiPBYePBYqOBYmOBYqQBYmPBYuPBYuOBYyQBYuQBYyOBYyOBY6PBY2QBfhP+M4F/CqLBXmOBX2UBYGZBYibBY6bBZWZBZmUBZ2PBfiCiwWRigWQigWOigWPigWPiQWQiAWNiQWOiQWOhwWPhwWMiAWNiAWMhwWNhgWLiAWLhwWKhgWLhgWKiAWKiAWIhwWJhgUO+Uj3h3QV9zaLBZyIBZmCBZV9BY97BYd7BYF9BX2CBXqHBftjiwV5jwV9lAWBmQWImwWL+Z8FjpsFlZkFmZQFnY4F92OLBZyIBZmCBZV9BY97BYd7BYF9BX2CBXqIBfs2iwUO+Ujw+VgV+HH9YwWRfAWKegWEfAV+gAV7hQV5jAV7kQV/lwX8cfljBYWaBYycBZKaBZiWBZuRBZ2KBZuFBQ75SPhWShWHewWBfQV9ggV6hwX7Y4sFeY8FfZQFgZkFiJsFjpsFlZkFmZQFnY4F9zaLBYv5SwX7NosFeY4FfZQFgZkFiJsFjpsFlZkFmZQFnY4F92OLBZyIBZmCBZV9BY97BQ75SPeo+WQVko8FjIsFjIwFkowFk40FjIoFjIwFk4kFkooFjIoFjIsFkocFkYcF9577ggWVfgWPewWIegWBfQV9ggV6hwV6jgV8lAX7f/dmBft/+2YFfIIFeogFeo8FfZQFgZkFiJwFj5sFlZgF9573ggUO+UiL+wEV+O6LBZyIBZqCBZV9BY57BYh7BYF9BXyCBXqIBfzuiwV6jgV8lAWBmQWImwWOmwWVmQWalAUO+Uj4POoVxcIFi/eQBVLBBVCnBS+LBVBvBUxQBWsvBYtQBaswBcpPBcdvBeaLBfcIZhWHiAWFhwVAZwWKigWJigWEigWFiQWJjAWJigX7BYsFiYwFiYoFhI0FhYwFiYwFiYwFQK8FhY8FhY8FP9MFiowFiowFiJEFh5EFiowFiowFZvYFipIFipIFi9IFjJIFjJEFsPcABYyNBYyMBY+RBY6RBYyMBYyMBdfTBZGPBZGPBdeuBYyMBY2MBZKMBZKNBYyKBY2MBfcFiwWMigWNjAWSiQWSigWMigWNigXWaAWQhwWQiAWLjwWPnAWUmAWalQWcjgWciAWagQWVfgWOegWL/IoFiHsFgX4FfIEFeogFeo4FfJUFgpgFh5sFDvlI9xOvFYaOBYuKBYd6BYF+BX2CBXqHBXmPBX2UBYGYBYicBYv5OAWOmwWVmQWZlAWdjgWciAWZggWVfQWPewWL+3YFkI4FkY8F1asFjIsFjIsFko0Fk40FjIoFjIwF9wSLBYyLBYuLBZOJBZOJBYyLBYuLBddrBZCHBZKIBdZKBYyKBY2KBY6FBY+GBYyJBYyKBbApBYyEBYyEBYtLBYqEBYqDBWYrBYqKBYqJBYeGBYiFBYmKBYqJBUBLBYWIBYWHBUBqBYqLBYqLBYSJBYOJBYqLBYqLBfsEiwWKjAWKigWDjQWEjQWKiwWKiwVBrAWA9w0VwlwFxnEF54sFx6UFycAFqdoFi70FbdsFTcAFT6QFL4sFUHIFVFwFDvlI+DLqFczNBZqVBZyPBZyIBZqDBZV9BY97BYl7BYF9BUVDBYWHBYWHBUZmBYiLBYmJBYWKBYWJBYiMBYmKBSGLBYmMBYiKBYWNBYWMBYmNBYmLBUSwBYWPBYWPBUXTBYqMBYqMBYeRBYeRBYuMBYqMBWn2BYqRBYqSBYvSBYyRBYySBa33AAWMjAWLjAWPkQWPkQWMjAWMjAXR0wWRjwWRjwXSrwWNiwWNjQWRjAWSjQWNigWNjAX1iwWNigWNjAWSiQWRigWNiQWNiwXRZwWRhwWRhwXRQwWVfQWNewWHewWBfQV8gwV6iAV6jwV8lQVKzQVWpgU3iwVVcAVRUAVtLgWLUAWoLwXGUAXCbwXdiwUO+Uj4PfUVwroFi/dxBVS6BVCkBS+LBU9yBU1WBW07BYtZBak8BclWBcdxBeeLBfcGYhWGiAWFhwVBagWKiwWKiwWEiQWDiQWKjAWKigX7BIsFiosFiosFhI0Fg40FiosFiosFQKwFhY8Fho4FP8sFio0FiYwFiJEFh5AFio0FiowFZusFipMFipIFi8sFjJIFjJIFsO0FjIwFjI0Fj5AFjpEFjYwFjIwF18wFkY4FkI8F16sFi4sFjIsFk40Fk40Fi4sFjIsF9wSLBYyKBYyMBZOJBZKJBYyLBYyLBdVrBZGHBZCIBYv3dgWPmwWVmQWZlAWcjgWdiAWZggWVfQWOewWL/TgFiHoFgX4FfYIFeYcFeo8FfZQFgZgFh5wFDvlI9x74IBV8YQX4GIsFg5QFZs0FbaYFS6cFJosFSm8F93r7/BXXzgWZlAWdjgWchwWZggWVfQWNegWIewWAfgU6QwWGiAWFhwU8ZgWJiwWKigWEigWEiQWJiwWKiwX7DYsFiosFiosFg40FhIwFiowFiosFOrAFhY8FhY4FO9MFiYwFiowFh5EFh5AFi40Fio0FY/YFipIFipIFi9IFjJIFjJIFs/cABYyNBYuNBY+QBY+QBYyNBY2MBdvTBZKOBZCPBdyvBYyLBYyMBZOMBZKNBYyLBYyLBfcNiwWMiwWMiwWTiQWSigWMigWMiwXbZwWQhwWRiAW1ZwWPhQWQhQWyRAWQewWJegWDfQV/ggWUhQWVfgWOegWIewWBfQV9ggV5iAX8SYsFi3UFrDAFz08FzG4F8IsFDvlI97n4VhWL/CQFiHsFgX0FfIIFeogFeo4FfJQFgZkFiJsFi/gkBfsGiwV6jgV8lQWCmAWHmwWPnAWUmAWalQWcjgX3BosFi8AFi40Fi40FjZEFjJEFjY0Fi4wFwOoFkZEFkJEFi4sFi4wFk44Fko8F9asFkowFkowF9YsFnIgFmoIFlX0FjnsFiHsFgX0FfIIFeogFKIsFOXIFZEUFi2EF9zuLBZyIBZqBBZV+BY56BYh7BYF+BXyBBXqIBQ75SPg99yMVwroFi/dxBVS7BVCkBS+LBU9yBU1WBW06BYtaBak7BclWBcdxBeeLBfcGYhWGiAWFhwVBagWKiwWKigWEigWDiQWKiwWKiwX7BIsFiosFiosFg40FhIwFiowFiosFQKwFhY8FhY4FQMwFiowFiYwFiJEFh5AFio0FiowFZuwFipIFipIFi8wFjJIFjJIFsOwFjI0FjI0Fj5AFjpAFjY0FjIwF1swFko4FkI8F16sFi4sFjIwFk4wFk40Fi4sFjIsF9wSLBYyLBYyLBZOJBZKKBYyKBYyLBdVrBZGHBZCIBYuLBY+cBZWYBZmVBZyOBZ2IBZmBBZV+BY56BYv8mAWKhAWKhAVmKgWKigWKiQWHhgWIhQWJigWKiQVlawWFhwWFhwVBbAWKigWKiwWEiQWDigWKiwWKiwX7BIsFiosFi4sFg4wFg40FiosFi4sFP6sFho8FhI8FQMsFio0FiYwFiJAFh5AFio0Fio0FZuwFiZwFj5sFlZgFm5QFnI0FnIcFmYEFlH0FrDQFyVYFx3EF54sFxqUFpKAFqdoFDvlI+L34CRWNhAWL+9AFiHsFgX0FfIIFeogFeo4FfJQFgZkFiJsFi/fIBW7TBVqfBSyLBU1yBS49BYv7vQWIewWBfQV8ggV6iAV6jgV8lAWBmQWImwWL+SwFjpsFlZkFmpQFnI4FnIgFmoIFlX0FjnsFi/uSBbKsBZGOBZGPBdeqBYyLBYuMBZOMBZONBYyLBYuLBfcGiwWMiwWLiwWTiQWTigWMigWLiwXXbAWLiwWLiwWShgWShwWLigWMiwWPhAWQhQWLigWLiwWxLAUO+Uj3mfmIFduLBZyIBZqCBZV9BY57BYh7BYF9BXyCBXqIBTuLBXqOBXyUBYGZBYibBY6bBZWZBZqUBfH7mRWL/E4FiHsFgX0FfIIFeogFeo4FfJQFgZkFiJsFi/hOBY6cBZWYBZqVBZyOBZyIBZqBBZV+BQ75SPgV+YgVyYsFnIgFmoIFlX0FjnsFiHsFgX0FfIIFeogFTYsFeo4FfJQFgpkFh5sFj5sFlJkFmpQF+wn+MhWGigWIjQWHiwUpqQV8kwWAmAWGmwWNmwWUmQWZlgWbjwWdiQXhcQXpoQWhyQWL+I4Fj5sFlJkFmpQFnI8FnIcFmoIFlX0FjnsFi/yVBYqEBYqFBWswBYiGBYmHBYmIBYmIBYeIBYeIBYiJBYiJBYaKBYaJBfsXbQWIiwWHigUO+Uj3f/eMFfsRLwWLIQWIewWBfQV8ggV6iAV6jgV8lAWCmQWHmwWL+SwFj5sFlJkFmpQFnI4FnIgFmoIFlX0FjnsFi/xXBff495sFm5IFnIwFnIYFmIEFk3wFjHoFhnwFgH4F+2v7MgX3mPtwBZV+BZB7BYh7BYJ9BX2BBXqHBXqNBXyTBQ75SPfu+WMVi/0xBYh7BYF9BXyCBXqIBXqOBXyUBYGZBYibBYv5MQWOmwWVmQWalAWcjwWchwWaggWVfQUO+Uj43/iYFZCGBYuKBYyJBYyFBY2EBYuKBYyJBYv8WwWHewWBfQV9ggV6iAV5jgV9lAWBmQWImwWL+EgFfJYFXIsFdHgFVDEFi/vmBYh7BYF9BX2CBXmIBXqOBX2UBYGZBYebBYv36gVo4wV1nAVdiwVzeAVVMQWL++YFh3sFgX0FfYIFeogFeY4FfZQFgZkFiJsFi/h9BY6cBZWYBZmVBZ2OBZyIBZmBBZV+BY2ABa2mBZGOBZGPBY2LBYyMBZKLBZKNBduLBZKJBZKLBYyKBY2LBZGHBZGIBbZoBYyJBY2KBY+GBY+GBYuJBY2JBZN1BZynBZCQBZCRBbWtBZGPBZGPBY2LBYyMBZKLBZKNBdyLBZKJBZKLBYyKBY2LBZGHBZGIBbZoBYyKBYyKBQ75SPi++B0VjIUFi/vyBYh7BYF9BXyCBXqIBXqOBXyUBYGZBYibBYv36wVt3QVaoQUtiwVPcAUsMwWL++AFiHsFgX0FfIIFeogFeo4FfJQFgZkFiJsFi/h9BY6cBZWYBZqVBZyOBZyIBZqBBZV+BY56BYtlBbCtBZKPBZCPBdiuBYyLBYyMBZKMBZONBYyLBYyLBfcGiwWMiwWNiwWSiQWSigWMigWNiwXWaAWMiwWLiwWShgWRhgWMiwWLiwWPhAWPhAWLiwWLiwWyIQUO+Uj37Ph4FTWLBVRwBU9PBWwvBYtQBaowBcdPBcNvBeCLBcKnBcfHBarmBYvGBWznBU/HBWH3AxWNjAWRiQWSigWNiQWNiwXTaAWRhgWRhwXTQwWLigWMiwWPhAWPhQWLigWMigWv+wAFjIUFjIQFi0QFioQFioUFZyAFiooFi4oFh4QFh4UFiosFi4oFQ0MFhYcFhYcFQ2YFiYsFiYkFhYoFhIkFiYwFiYoF+wCLBYmMBYmKBYSNBYWMBYmNBYmLBUOwBYWPBYWPBUPTBYuMBYqLBYeRBYeSBYuMBYqMBWf2BYqRBYqSBYvSBYySBYyRBa/3AAWMjAWLjAWPkQWPkgWMiwWLjAXT0wWSjwWQkAXTrgWNiwWNjQWSjAWRjQWNigWNjAX3AIsFDvlI9xTXFYWPBYv7dQWHewWCfQV8ggV6iAV6jgV8lAWBmQWImwWL+TMFjpwFlZgFmpUFnI4FnIgFmoEFlH4Fj3oFi4sFkY8FkI4F1asFjIsFjIwFk4wFko0FjIsFjIsF9wSLBYyLBYuLBZOJBZOKBYyKBYuLBdZsBZGHBZGHBdZLBY2KBYyJBY+GBY+GBYuJBY2JBa8rBY2EBYyDBYtLBYqEBYmEBWYsBYqJBYuJBYeGBYeFBYqKBYmKBUBLBYWHBYaIBUBqBYqLBYqKBYOKBYSJBYqLBYqLBfsEiwWKiwWKiwWDjQWEjAWKjAWKiwVBrAWA9w0VwlwFxnEF54sFx6UFyb8FqdoFi7wFbdsFTb8FT6QFL4sFUHIFVFwFDvlI+D33JRXCugWL924FVLoFUKQFL4sFT3IFTVcFbTsFi1oFqTwFyVcFx3EF54sF9wZiFYaIBYWHBUFqBYqLBYqLBYSJBYOJBYqMBYqKBfsEiwWKjAWKigWEjQWDjQWKiwWKiwVArAWGjgWFjwVAywWJjA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<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 1: U_DRV.OA1, J_MOTOR.pin3, TP_MOTOR_A_POS.pin1, pcb_trace_2, pcb_trace_6 <-> U_DRV.OA2, J_MOTOR.pin4, TP_MOTOR_A_NEG.pin1, pcb_trace_3, pcb_trace_7, pcb_via_11, pcb_via_12</title>
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<circle cx="313.32" cy="176.30" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
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<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 2: U_DRV.VREF, R_VREF_TOP.pin2, R_VREF_BOTTOM.pin1, C_VREF.pin1, source_net_13_mst0_0, source_net_13_mst1_0, source_net_13_mst2_0, pcb_via_21, pcb_via_22, pcb_via_23 <-> U_DRV.STEP, source_net_7_0, pcb_via_38, pcb_via_39, pcb_via_40</title>
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<circle cx="374.42" cy="197.66" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 3: U_DRV.ENN, source_net_9_mst0_0, pcb_via_30, pcb_via_31, pcb_via_32, pcb_via_33 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
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<circle cx="372.51" cy="269.28" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 4: U_DRV.OB2, J_MOTOR.pin1, TP_MOTOR_B_NEG.pin1, pcb_trace_0, pcb_trace_4, pcb_via_9, pcb_via_10 <-> U_DRV.OB1, J_MOTOR.pin2, TP_MOTOR_B_POS.pin1, pcb_trace_1, pcb_trace_5</title>
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<circle cx="362.12" cy="145.55" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 5: U_DRV.OB1, J_MOTOR.pin2, TP_MOTOR_B_POS.pin1, pcb_trace_1, pcb_trace_5 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="272.05" cy="287.57" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="272.05" cy="287.57" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 6: pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND <-> U_DRV.BRA, source_trace_121__source_net_17_0, pcb_via_81, pcb_via_82, pcb_via_83</title>
<circle cx="293.92" cy="244.53" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="293.92" cy="244.53" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 7: U_DRV.VCC_IO, U_DRV.STDBY, C_VIO.pin1, source_net_4_mst0_0, source_net_4_mst2_0, source_net_4_mst4_0, source_net_4_mst5_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="336.88" cy="194.92" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="336.88" cy="194.92" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 8: U_DRV.VREF, R_VREF_TOP.pin2, R_VREF_BOTTOM.pin1, C_VREF.pin1, source_net_13_mst0_0, source_net_13_mst1_0, source_net_13_mst2_0, pcb_via_21, pcb_via_22, pcb_via_23 <-> U_DRV.VCC_IO, U_DRV.STDBY, C_VIO.pin1, source_net_4_mst0_0, source_net_4_mst2_0, source_net_4_mst4_0, source_net_4_mst5_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56</title>
<circle cx="374.20" cy="194.88" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="374.20" cy="194.88" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 9: U_DRV.DIR, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37 <-> U_DRV.VCC_IO, U_DRV.STDBY, C_VIO.pin1, source_net_4_mst0_0, source_net_4_mst2_0, source_net_4_mst4_0, source_net_4_mst5_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56</title>
<circle cx="324.16" cy="194.74" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="324.16" cy="194.74" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 10: U_DRV.STEP, source_net_7_0, pcb_via_38, pcb_via_39, pcb_via_40 <-> U_DRV.VCC_IO, U_DRV.STDBY, C_VIO.pin1, source_net_4_mst0_0, source_net_4_mst2_0, source_net_4_mst4_0, source_net_4_mst5_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56</title>
<circle cx="374.20" cy="197.83" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="374.20" cy="197.83" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 11: U_DRV.DIR, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="307.07" cy="224.06" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="307.07" cy="224.06" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 12: U_DRV.DIR, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37 <-> U_DRV.VCC_IO, U_DRV.STDBY, C_VIO.pin1, source_net_4_mst0_0, source_net_4_mst2_0, source_net_4_mst4_0, source_net_4_mst5_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56</title>
<circle cx="560.03" cy="193.40" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="560.03" cy="193.40" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 13: U_DRV.OB1, J_MOTOR.pin2, TP_MOTOR_B_POS.pin1, pcb_trace_1, pcb_trace_5 <-> U_DRV.OA2, J_MOTOR.pin4, TP_MOTOR_A_NEG.pin1, pcb_trace_3, pcb_trace_7, pcb_via_11, pcb_via_12</title>
<circle cx="314.08" cy="163.12" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="314.08" cy="163.12" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 14: pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND <-> D_BLOCK.cathode, C_VM_HF1.pin1, C_VM_HF2.pin1, U_DRV.VS2, U_DRV.VS1, C_VCP.pin2, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst0_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst1_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst2_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst3_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst4_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst5_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst6_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst7_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst9_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst10_0, pcb_via_84, pcb_via_85, pcb_via_86, pcb_via_87, pcb_via_88, pcb_via_89, pcb_via_90, pcb_via_91, pcb_via_92, pcb_via_93, pcb_via_94, pcb_via_95, pcb_via_96</title>
<circle cx="280.53" cy="211.13" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="280.53" cy="211.13" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 15: U_DRV.ENN, source_net_9_mst0_0, pcb_via_30, pcb_via_31, pcb_via_32, pcb_via_33 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="552.55" cy="225.02" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="552.55" cy="225.02" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 16: U_DRV.STEP, source_net_7_0, pcb_via_38, pcb_via_39, pcb_via_40 <-> U_DRV.VCC_IO, U_DRV.STDBY, C_VIO.pin1, source_net_4_mst0_0, source_net_4_mst2_0, source_net_4_mst4_0, source_net_4_mst5_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56</title>
<circle cx="534.47" cy="224.66" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="534.47" cy="224.66" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 17: U_DRV.OA1, J_MOTOR.pin3, TP_MOTOR_A_POS.pin1, pcb_trace_2, pcb_trace_6 <-> U_DRV.DIR, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37</title>
<circle cx="268.05" cy="190.41" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="268.05" cy="190.41" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 18: U_DRV.VCC_IO, U_DRV.STDBY, C_VIO.pin1, source_net_4_mst0_0, source_net_4_mst2_0, source_net_4_mst4_0, source_net_4_mst5_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, J_USB.A1B12, J_USB.B1A12, R_CC1.pin2, R_CC2.pin2, C_VM_HF1.pin2, C_VM_HF2.pin2, U_DRV.GND2, U_DRV.SPREAD, U_DRV.MS1_AD0, U_DRV.MS2_AD1, U_DRV.CLK, U_DRV.GND1, U_DRV.UNUSED, U_DRV.EP, C_5V.pin2, C_VIO.pin2, R_VREF_BOTTOM.pin2, C_VREF.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, source_net_0_mst0_0, source_net_0_mst1_0, source_net_0_mst2_0, source_net_0_mst3_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst6_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst10_0, source_net_0_mst11_0, source_net_0_mst12_0, source_net_0_mst13_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst18_0, source_net_0_mst19_0, source_net_0_mst20_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst23_0, source_net_0_mst24_0, source_net_0_mst25_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst30_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="536.77" cy="210.60" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="536.77" cy="210.60" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="top">
<title>SHORT 19: U_DRV.OA1, J_MOTOR.pin3, TP_MOTOR_A_POS.pin1, pcb_trace_2, pcb_trace_6 <-> U_DRV.DIR, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37</title>
<circle cx="262.36" cy="196.18" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="262.36" cy="196.18" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="inner1">
<title>SHORT 20: source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37 <-> source_trace_121__source_net_17_0, pcb_via_81, pcb_via_82, pcb_via_83</title>
<circle cx="194.85" cy="293.69" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="194.85" cy="293.69" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="inner2">
<title>SHORT 21: source_net_9_mst0_0, source_net_9_mst1_0, pcb_via_30, pcb_via_31, pcb_via_32, pcb_via_33 <-> source_trace_121__source_net_17_0, pcb_via_81, pcb_via_82, pcb_via_83</title>
<circle cx="290.92" cy="240.67" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="290.92" cy="240.67" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 22: pcb_trace_4, pcb_via_9, pcb_via_10 <-> pcb_trace_7, pcb_via_11, pcb_via_12</title>
<circle cx="338.51" cy="144.74" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="338.51" cy="144.74" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 23: R_SENSE_B.pin1, source_trace_122__source_net_18_0, pcb_via_80 <-> R_SENSE_A.pin1, source_trace_121__source_net_17_0, pcb_via_81, pcb_via_82, pcb_via_83</title>
<circle cx="291.19" cy="244.54" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="291.19" cy="244.54" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 24: U_MCU.PA1, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37 <-> U_MCU.PA0, source_net_7_0, pcb_via_38, pcb_via_39, pcb_via_40</title>
<circle cx="523.99" cy="229.45" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="523.99" cy="229.45" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 25: U_MCU.PA0, source_net_7_0, pcb_via_38, pcb_via_39, pcb_via_40 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, D_VM_TVS.pin2, C_VM_BULK1.pin2, C_VM_BULK2.pin2, C_VM_BULK3.pin2, U_3V3.GND, C_LDO_IN.pin2, C_LDO_OUT.pin2, U_MCU.GND, C_MCU_HF.pin2, C_MCU_BULK.pin2, R_SENSE_A.pin2, R_SENSE_B.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, TP_GND.pin1, source_net_0_mst2_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst11_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst16_0, source_net_0_mst17_0, source_net_0_mst19_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst31_0, source_net_0_mst32_0, source_net_0_mst33_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="511.19" cy="226.94" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="511.19" cy="226.94" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 26: pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, D_VM_TVS.pin2, C_VM_BULK1.pin2, C_VM_BULK2.pin2, C_VM_BULK3.pin2, U_3V3.GND, C_LDO_IN.pin2, C_LDO_OUT.pin2, U_MCU.GND, C_MCU_HF.pin2, C_MCU_BULK.pin2, R_SENSE_A.pin2, R_SENSE_B.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, TP_GND.pin1, source_net_0_mst2_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst11_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst16_0, source_net_0_mst17_0, source_net_0_mst19_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst31_0, source_net_0_mst32_0, source_net_0_mst33_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND <-> D_VM_TVS.pin1, C_VM_BULK1.pin1, C_VM_BULK2.pin1, C_VM_BULK3.pin1, U_3V3.IN, C_LDO_IN.pin1, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst0_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst1_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst2_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst3_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst4_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst6_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst7_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst8_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst9_0, source_trace_106__source_trace_107__source_trace_108__source_net_3_mst10_0, pcb_via_84, pcb_via_85, pcb_via_86, pcb_via_87, pcb_via_88, pcb_via_89, pcb_via_90, pcb_via_91, pcb_via_92, pcb_via_93, pcb_via_94, pcb_via_95, pcb_via_96</title>
<circle cx="280.23" cy="203.17" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="280.23" cy="203.17" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 27: U_MCU.PA1, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, D_VM_TVS.pin2, C_VM_BULK1.pin2, C_VM_BULK2.pin2, C_VM_BULK3.pin2, U_3V3.GND, C_LDO_IN.pin2, C_LDO_OUT.pin2, U_MCU.GND, C_MCU_HF.pin2, C_MCU_BULK.pin2, R_SENSE_A.pin2, R_SENSE_B.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, TP_GND.pin1, source_net_0_mst2_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst11_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst16_0, source_net_0_mst17_0, source_net_0_mst19_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst31_0, source_net_0_mst32_0, source_net_0_mst33_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="514.29" cy="228.18" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="514.29" cy="228.18" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 28: U_MCU.PA1, source_net_8_0, pcb_via_34, pcb_via_35, pcb_via_36, pcb_via_37 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, D_VM_TVS.pin2, C_VM_BULK1.pin2, C_VM_BULK2.pin2, C_VM_BULK3.pin2, U_3V3.GND, C_LDO_IN.pin2, C_LDO_OUT.pin2, U_MCU.GND, C_MCU_HF.pin2, C_MCU_BULK.pin2, R_SENSE_A.pin2, R_SENSE_B.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, TP_GND.pin1, source_net_0_mst2_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst11_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst16_0, source_net_0_mst17_0, source_net_0_mst19_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst31_0, source_net_0_mst32_0, source_net_0_mst33_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="272.24" cy="195.70" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="272.24" cy="195.70" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 29: U_MCU.PA6 <-> pcb_plated_hole_0, pcb_plated_hole_1, pcb_plated_hole_2, pcb_plated_hole_3, D_VM_TVS.pin2, C_VM_BULK1.pin2, C_VM_BULK2.pin2, C_VM_BULK3.pin2, U_3V3.GND, C_LDO_IN.pin2, C_LDO_OUT.pin2, U_MCU.GND, C_MCU_HF.pin2, C_MCU_BULK.pin2, R_SENSE_A.pin2, R_SENSE_B.pin2, pcb_via_0, pcb_via_1, pcb_via_2, pcb_via_3, pcb_via_4, pcb_via_5, pcb_via_6, pcb_via_7, pcb_via_8, TP_GND.pin1, source_net_0_mst2_0, source_net_0_mst4_0, source_net_0_mst5_0, source_net_0_mst7_0, source_net_0_mst8_0, source_net_0_mst9_0, source_net_0_mst11_0, source_net_0_mst14_0, source_net_0_mst15_0, source_net_0_mst16_0, source_net_0_mst17_0, source_net_0_mst19_0, source_net_0_mst21_0, source_net_0_mst22_0, source_net_0_mst26_0, source_net_0_mst27_0, source_net_0_mst28_0, source_net_0_mst29_0, source_net_0_mst31_0, source_net_0_mst32_0, source_net_0_mst33_0, pcb_via_57, pcb_via_58, pcb_via_59, pcb_via_60, pcb_via_61, pcb_via_62, pcb_via_63, pcb_via_64, pcb_via_65, pcb_via_66, pcb_via_67, pcb_via_68, pcb_via_69, pcb_via_70, pcb_via_71, pcb_via_72, pcb_via_73, pcb_via_74, pcb_via_75, pcb_via_76, pcb_via_77, pcb_via_78, pcb_via_79, copperpour:GND</title>
<circle cx="484.60" cy="258.47" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="484.60" cy="258.47" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 30: U_MCU.PA3, R_UART.pin1, source_net_10_0 <-> U_3V3.OUT, C_LDO_OUT.pin1, U_MCU.VDD, C_MCU_HF.pin1, C_MCU_BULK.pin1, R_EN_PU.pin1, TP_3V3.pin1, source_net_4_mst0_0, source_net_4_mst1_0, source_net_4_mst3_0, source_net_4_mst4_0, source_net_4_mst5_0, source_net_4_mst6_0, source_net_4_mst7_0, source_net_4_mst8_0, pcb_via_52, pcb_via_53, pcb_via_54, pcb_via_55, pcb_via_56</title>
<circle cx="592.10" cy="225.77" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="592.10" cy="225.77" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 31: U_MCU.PA2, R_EN_PU.pin2, source_net_9_mst0_0, source_net_9_mst1_0, pcb_via_30, pcb_via_31, pcb_via_32, pcb_via_33 <-> U_MCU.PA0, source_net_7_0, pcb_via_38, pcb_via_39, pcb_via_40</title>
<circle cx="532.82" cy="235.59" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="532.82" cy="235.59" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
<g data-type="short-debug" data-mode="pcb" data-layer="bottom">
<title>SHORT 32: R_UART.pin2, source_net_11_0, pcb_via_29 <-> U_MCU.PA2, R_EN_PU.pin2, source_net_9_mst0_0, source_net_9_mst1_0, pcb_via_30, pcb_via_31, pcb_via_32, pcb_via_33</title>
<circle cx="555.18" cy="225.98" r="14" fill="none" stroke="#9b5cff" stroke-width="4"/>
<circle cx="555.18" cy="225.98" r="6" fill="none" stroke="#9b5cff" stroke-width="3"/>
</g>
</svg>