AnasSarkiz/am625sip-linux
An electronic component representing an AM625 system-in-package with mapped pins and physical footprint for PCB integration.
- Version
- 1.0.3
- License
- unset
- Stars
- 0
subcircuits/Processor.tsx
import { Am625Sip } from "../components/Am625Sip"
import { processorBreakouts } from "./processor-breakouts"
import { Fragment } from "react"
import { ProcessorSchematic } from "../components/ProcessorSchematic"
export function Processor({ breakoutCount }: { breakoutCount: number }) {
return (
<group name="processor" subcircuit autorouter="auto_local" autorouterVersion="beta_pipeline9"
width={64} height={64} autorouterEffortLevel="5x"
minTraceWidth={0.09} minTraceToPadEdgeClearance={0.09}
minViaHoleDiameter={0.2032} minViaPadDiameter={0.4572}
minViaEdgeToPadEdgeClearance={0.09}>
<breakout name="cpu_escape" autorouter="fanout" width={32} height={32}
fanoutRoutingLayers={["top", "bottom"]}
busFanoutDirections={{ MICROSD: "topside_center", ...(breakoutCount > 2 ? { MICROSD_INNER: "rightside_bottom" } : {}) }}>
<Am625Sip name="U1" pcbX={0} pcbY={0}
noSchematicRepresentation />
</breakout>
<ProcessorSchematic />
{processorBreakouts.slice(0, breakoutCount).map((breakout) => (
<Fragment key={breakout.name}>
<testpoint name={`TP_${breakout.name}`}
pcbX={breakout.pcbX} pcbY={breakout.pcbY}
layer={breakout.layer}
footprintVariant="pad" padDiameter={0.6}
schSheetName="processor" schSectionName="microsd_breakout" />
<trace name={breakout.name} from={`.U1 > .${breakout.ball}`} to={`.TP_${breakout.name} > .pin1`} />
</Fragment>
))}
<bus name="MICROSD" preferredLayer="top" connections={processorBreakouts.slice(0, Math.min(2, breakoutCount)).map((breakout) => breakout.name)} />
{breakoutCount > 2 && <bus name="MICROSD_INNER" connections={processorBreakouts.slice(2, breakoutCount).map((breakout) => breakout.name)} />}
</group>
)
}