AnasSarkiz/NEMA14_RP2040

A NEMA motor assembly concept with a controller board, four proposed M3 screws and spacers, motor lead splices, and a JST 4-pin connector harness.

Version
1.13.0
License
ISC
Stars
0

docs/supplier-cad.md

> Historical baseline document: this predates the opposite-edge v1.11.0 draft. See [current draft and blockers](opposite-edge-review.md) for current evidence.

# JLCPCB imports and printable schematics

Every fitted component uses a supplier component created with `tsci import --jlcpcb --download --use-exact-footprint C<number>`. `src/jlcpcb-catalog.json` maps every reference to its exact JLCPCB part and records original import/model hashes. The active component resolver in `src/supplier-parts.tsx` renders the imported JSX; it rejects custom footprint and CAD overrides. Unused generic component files have been removed.

`imports/supplier/` contains the native TSX, unchanged original `.tsx.original`, OBJ and STEP files. Active TSX only adds React compatibility, public GitHub model URLs and a CAD anchor correction for asymmetric pad bounds. Imported footprint JSX is checked byte for byte against the original. No model vertices or supplier footprints have been resized or translated. Public raw GitHub URLs keep large CAD assets outside the registry upload limit.

Both USB receptacles are **C165948 / TYPE-C-31-M-12**. All 16 numbered supplier contacts, including four shield tabs, use the actual land pattern. Their model mating mouths are exactly (−6.2, 17.5) and (6.2, 17.5) mm, both facing +Y. Model bounds are checked against native courtyards. Coordinate checks do not establish physical rear-motor fit.

Motor, debug and BOOT connections are bare PCB solder interfaces. They have no fitted component to import or model. The four mounting holes are PCB features.

The exact sense resistors are **C2930216 / FRL0805FR240TS**, 0.24 Ω, 1%, 125 mW. A 39k/10k VREF divider sets about 0.351 A nominal peak phase current; estimated sense dissipation is 29.5 mW. The bulk capacitor is **C72522 / RVT1V470M0605**, 47 µF, 35 V. Verify current, thermal behavior and capacitor bias on an assembled prototype.

Native numbered landscape A4 sheets include every physical pin and chip-purpose text. `report-presentation.py` verifies original imported footprint JSX, supplier IDs/MPNs, both CAD assets and hashes, 3D placement bounds, USB opening planes, A4 dimensions and pin/net coverage.

CH224A U_PD uses **C42459160** with the manufacturer pin map and the unchanged ESSOP10 land pattern, including the grounded exposed pad. R_PD is now **C21189 / 0603WAF0000T5E**, 0 Ω, on its original 0603 pads. New R_PD_CFG is **C25796 / 0402WGF5602TCE**, 56 kΩ, 1%, 0402, and requests 15 V. C_PD remains **C15849 / CL10A105KB8NNNC**, 1 µF / 50 V. See [migration evidence and limits](ch224a-migration.md).