AnasSarkiz/NEMA14_RP2040
A NEMA motor assembly concept with a controller board, four proposed M3 screws and spacers, motor lead splices, and a JST 4-pin connector harness.
- Version
- 1.13.0
- License
- ISC
- Stars
- 0
artifacts/reference-feedback/via-cage-repairs.json
[
{
"xy_mm": [
1.3,
3.4
],
"radius_mm": 1.7,
"protected_supplier_pads_and_reserved_escapes": true,
"removed_for_rerouting": [
{
"id": "same_side_repair_22_QSPI_SD1_0_via_11",
"net": "QSPI_SD1"
},
{
"id": "same_side_repair_12_V3V3_0",
"net": "V3V3"
},
{
"id": "same_side_repair_30_QSPI_SD1_0",
"net": "QSPI_SD1"
},
{
"id": "same_side_repair_11_QSPI_SD0_0",
"net": "QSPI_SD0"
},
{
"id": "same_side_repair_12_QSPI_SD2_0",
"net": "QSPI_SD2"
},
{
"id": "same_side_repair_1_LED_B_1",
"net": "LED_B"
},
{
"id": "same_side_repair_9_V1V1_0",
"net": "V1V1"
},
{
"id": "same_side_repair_10_V1V1_1",
"net": "V1V1"
},
{
"id": "same_side_repair_0_VM_SENSE_0",
"net": "VM_SENSE"
},
{
"id": "same_side_repair_4_V3V3_2_rerouted",
"net": "V3V3"
},
{
"id": "same_side_repair_13_QSPI_SD1_0",
"net": "QSPI_SD1"
},
{
"id": "same_side_repair_0_V3V3_0",
"net": "V3V3"
}
]
},
{
"xy_mm": [
1.3,
3.4
],
"radius_mm": 1.7,
"protected_supplier_pads_and_reserved_escapes": true,
"removed_for_rerouting": [
{
"id": "same_side_repair_0_LED_B_0_rerouted",
"net": "LED_B"
},
{
"id": "same_side_repair_2_V3V3_0_rerouted_rerouted_rerouted",
"net": "V3V3"
},
{
"id": "same_side_repair_3_V3V3_1_rerouted_rerouted_rerouted",
"net": "V3V3"
},
{
"id": "same_side_repair_4_V3V3_2_rerouted",
"net": "V3V3"
},
{
"id": "same_side_repair_5_V1V1_0",
"net": "V1V1"
},
{
"id": "same_side_repair_6_V1V1_1",
"net": "V1V1"
},
{
"id": "same_side_repair_7_V1V1_2",
"net": "V1V1"
},
{
"id": "same_side_repair_8_V1V1_3",
"net": "V1V1"
},
{
"id": "same_side_repair_9_QSPI_SD0_0",
"net": "QSPI_SD0"
},
{
"id": "same_side_repair_12_QSPI_SD1_0_via_3",
"net": "QSPI_SD1"
},
{
"id": "same_side_repair_12_QSPI_SD1_0",
"net": "QSPI_SD1"
},
{
"id": "same_side_repair_13_QSPI_SD2_0",
"net": "QSPI_SD2"
}
]
},
{
"xy_mm": [
0.0,
6.5
],
"radius_mm": 1.7,
"protected_supplier_pads_and_reserved_escapes": true,
"removed_for_rerouting": [
{
"id": "freerouted_trace_70",
"net": "DATA_VBUS"
},
{
"id": "freerouted_trace_72",
"net": "DATA_VBUS"
},
{
"id": "freerouted_trace_86",
"net": "DATA_VBUS"
},
{
"id": "freerouted_trace_110",
"net": "V3V3"
},
{
"id": "freerouted_trace_221",
"net": "QSPI_SS"
},
{
"id": "freerouted_trace_405",
"net": "PWR_LED_A"
},
{
"id": "freerouted_trace_409",
"net": "STATUS_B_K"
},
{
"id": "freerouted_trace_412",
"net": "STATUS_B_K"
},
{
"id": "freerouted_trace_413",
"net": "STATUS_B_K"
},
{
"id": "freerouted_via_114",
"net": "STATUS_R_K"
},
{
"id": "same_side_repair_7_V3V3_1",
"net": "V3V3"
},
{
"id": "same_side_repair_15_V3V3_9",
"net": "V3V3"
},
{
"id": "same_side_repair_14_PWR_LED_A_0",
"net": "PWR_LED_A"
},
{
"id": "same_side_repair_15_STATUS_R_K_0",
"net": "STATUS_R_K"
},
{
"id": "same_side_repair_5_DATA_VBUS_0_via_2",
"net": "DATA_VBUS"
},
{
"id": "same_side_repair_5_DATA_VBUS_0",
"net": "DATA_VBUS"
},
{
"id": "same_side_repair_12_PWR_LED_A_0",
"net": "PWR_LED_A"
}
]
},
{
"xy_mm": [
2.0,
-4.7
],
"radius_mm": 1.3,
"protected_supplier_pads_and_reserved_escapes": true,
"removed_for_rerouting": [
{
"id": "freerouted_trace_326",
"net": "DIR"
},
{
"id": "same_side_repair_29_PWR_LED_A_0_via_149",
"net": "PWR_LED_A"
},
{
"id": "same_side_repair_15_V3V3_3",
"net": "V3V3"
},
{
"id": "same_side_repair_9_XTAL_OUT_0",
"net": "XTAL_OUT"
},
{
"id": "same_side_repair_5_MCU_DP_0",
"net": "MCU_DP"
},
{
"id": "same_side_repair_6_XOUT_0",
"net": "XOUT"
},
{
"id": "same_side_repair_7_XTAL_OUT_0",
"net": "XTAL_OUT"
}
]
},
{
"xy_mm": [
2.7,
3.8
],
"radius_mm": 1.0,
"protected_supplier_pads_and_reserved_escapes": true,
"removed_for_rerouting": [
{
"id": "same_side_repair_2_V3V3_0_rerouted_rerouted",
"net": "V3V3"
},
{
"id": "same_side_repair_10_SWCLK_0",
"net": "SWCLK"
},
{
"id": "same_side_repair_15_MCU_DP_0",
"net": "MCU_DP"
},
{
"id": "same_side_repair_16_V3V3_0",
"net": "V3V3"
},
{
"id": "same_side_repair_20_V1V1_1",
"net": "V1V1"
},
{
"id": "same_side_repair_22_V1V1_3",
"net": "V1V1"
}
]
}
]