AnasSarkiz/NEMA14_RP2040

A NEMA motor assembly concept with a controller board, four proposed M3 screws and spacers, motor lead splices, and a JST 4-pin connector harness.

Version
1.13.0
License
ISC
Stars
0

artifacts/reference-feedback/reserved-ic-fanouts.json

[
  {
    "removed_copper": [
      "freerouted_trace_13",
      "freerouted_trace_14",
      "freerouted_trace_24",
      "freerouted_trace_25",
      "freerouted_via_8",
      "freerouted_trace_104",
      "freerouted_trace_162",
      "freerouted_trace_163",
      "freerouted_trace_164",
      "freerouted_trace_165",
      "freerouted_trace_170",
      "freerouted_trace_225",
      "freerouted_trace_229",
      "freerouted_via_43",
      "freerouted_trace_231",
      "freerouted_via_46",
      "freerouted_trace_234",
      "freerouted_trace_236",
      "freerouted_trace_238",
      "freerouted_via_48",
      "freerouted_via_50",
      "freerouted_trace_240",
      "freerouted_trace_241",
      "freerouted_trace_242",
      "freerouted_trace_247",
      "freerouted_trace_255",
      "freerouted_trace_257",
      "freerouted_via_55",
      "freerouted_trace_264",
      "freerouted_trace_269",
      "freerouted_via_58",
      "freerouted_trace_275",
      "freerouted_trace_285",
      "freerouted_via_67",
      "freerouted_trace_288",
      "freerouted_trace_289",
      "freerouted_trace_296",
      "freerouted_trace_373",
      "freerouted_trace_374",
      "freerouted_via_98",
      "same_side_repair_6_V3V3_0",
      "same_side_repair_10_V3V3_4",
      "same_side_repair_22_SLEEP_1_via_41",
      "same_side_repair_22_SLEEP_1",
      "same_side_repair_25_QSPI_SS_0",
      "same_side_repair_26_QSPI_SD2_0",
      "same_side_repair_27_XIN_0"
    ],
    "reserved_fanouts": [
      {
        "component": "U_MCU",
        "port": "pcb_port_87",
        "net": "TEMP_SCL",
        "via_xy_mm": [
          6.625,
          0.8
        ]
      },
      {
        "component": "U_MCU",
        "port": "pcb_port_73",
        "net": "SWDIO",
        "via_xy_mm": [
          3.2,
          -4.325
        ]
      },
      {
        "component": "U_FLASH",
        "port": "pcb_port_134",
        "net": "QSPI_SD0",
        "via_xy_mm": [
          -5.275,
          -4.775
        ]
      }
    ],
    "all_geometry_requires_final_independent_checks": true
  },
  {
    "removed_copper": [
      "freerouted_trace_2",
      "freerouted_trace_12",
      "freerouted_trace_21",
      "freerouted_trace_138",
      "freerouted_trace_151",
      "freerouted_trace_159",
      "freerouted_trace_174",
      "freerouted_trace_191",
      "freerouted_trace_192",
      "freerouted_trace_193",
      "freerouted_trace_199",
      "freerouted_trace_215",
      "freerouted_trace_216",
      "freerouted_trace_224",
      "freerouted_trace_226",
      "freerouted_trace_227",
      "freerouted_trace_228",
      "freerouted_via_45",
      "freerouted_trace_230",
      "freerouted_trace_235",
      "freerouted_via_51",
      "freerouted_trace_243",
      "freerouted_trace_253",
      "freerouted_trace_254",
      "freerouted_via_54",
      "freerouted_trace_258",
      "freerouted_trace_260",
      "freerouted_trace_262",
      "freerouted_trace_263",
      "freerouted_trace_280",
      "freerouted_trace_293",
      "freerouted_trace_332",
      "freerouted_trace_421",
      "freerouted_trace_429",
      "feedback_ground_escape_pcb_port_67",
      "feedback_ground_escape_pcb_port_67_via",
      "feedback_ground_escape_pcb_port_150",
      "feedback_ground_escape_pcb_port_150_via",
      "same_side_repair_0_TEMP_SDA_0",
      "same_side_repair_4_VM_SENSE_0",
      "same_side_repair_5_PD_VBUS_0",
      "same_side_repair_8_V3V3_2",
      "same_side_repair_12_V3V3_6",
      "same_side_repair_18_STEP_0",
      "same_side_repair_23_SENSE1_0",
      "same_side_repair_24_V1V1_0",
      "same_side_repair_29_PWR_LED_A_0",
      "same_side_repair_31_STATUS_R_C_0",
      "feedback_fanout_pcb_port_87",
      "feedback_fanout_pcb_port_87_via",
      "feedback_fanout_pcb_port_73",
      "feedback_fanout_pcb_port_73_via",
      "feedback_fanout_pcb_port_134",
      "same_side_repair_0_TEMP_SDA_0_rerouted_via_2",
      "same_side_repair_0_TEMP_SDA_0_rerouted",
      "same_side_repair_1_TEMP_SCL_0",
      "same_side_repair_2_BUZZER_PWM_0",
      "same_side_repair_3_LED_R_0",
      "same_side_repair_4_VM_SENSE_0_rerouted_via_24",
      "same_side_repair_4_VM_SENSE_0_rerouted",
      "same_side_repair_5_PD_VBUS_0_rerouted_via_3",
      "same_side_repair_5_PD_VBUS_0_rerouted",
      "same_side_repair_6_PD_VBUS_1",
      "same_side_repair_7_V3V3_0",
      "same_side_repair_8_V3V3_1",
      "same_side_repair_9_V3V3_2",
      "same_side_repair_10_V3V3_3",
      "same_side_repair_11_V3V3_4",
      "same_side_repair_14_SLEEP_2_via_11",
      "same_side_repair_14_SLEEP_2",
      "same_side_repair_15_SENSE1_0_via_8",
      "same_side_repair_15_SENSE1_0",
      "same_side_repair_16_V1V1_0",
      "same_side_repair_17_V1V1_1_via_2",
      "same_side_repair_17_V1V1_1",
      "same_side_repair_18_QSPI_SS_0",
      "same_side_repair_19_QSPI_SCLK_0_via_7",
      "same_side_repair_19_QSPI_SCLK_0",
      "same_side_repair_20_QSPI_SCLK_1_via_5",
      "same_side_repair_20_QSPI_SCLK_1",
      "same_side_repair_21_QSPI_SD0_0_via_13",
      "same_side_repair_21_QSPI_SD0_0",
      "same_side_repair_22_QSPI_SD1_0",
      "same_side_repair_23_QSPI_SD3_0",
      "same_side_repair_24_XIN_0",
      "same_side_repair_25_RUN_0"
    ],
    "reserved_fanouts": [
      {
        "component": "U_MCU",
        "port": "pcb_port_93",
        "net": "V1V1",
        "via_xy_mm": [
          3.75,
          4.325
        ]
      },
      {
        "component": "U_MCU",
        "port": "pcb_port_87",
        "net": "TEMP_SCL",
        "via_xy_mm": [
          6.425000000000001,
          1.4000000000000001
        ]
      },
      {
        "component": "U_MCU",
        "port": "pcb_port_73",
        "net": "SWDIO",
        "via_xy_mm": [
          3.5,
          -4.325
        ]
      },
      {
        "component": "U_MCU",
        "port": "pcb_port_72",
        "net": "SWCLK",
        "via_xy_mm": [
          2.8000000000000003,
          -4.325
        ]
      },
      {
        "component": "U_MCU",
        "port": "pcb_port_69",
        "net": "XOUT",
        "via_xy_mm": [
          1.9000000000000001,
          -4.325
        ]
      },
      {
        "component": "U_FLASH",
        "port": "pcb_port_132",
        "net": "QSPI_SD2",
        "via_xy_mm": [
          -5.4750000000000005,
          -10.125
        ]
      },
      {
        "component": "U_FLASH",
        "port": "pcb_port_136",
        "net": "QSPI_SD3",
        "via_xy_mm": [
          -6.125,
          -5.375
        ]
      },
      {
        "component": "U_DRV",
        "port": "pcb_port_223",
        "net": "SENSE2",
        "via_xy_mm": [
          3.0,
          -8.1
        ]
      },
      {
        "component": "U_DRV",
        "port": "pcb_port_220",
        "net": "A_PLUS",
        "via_xy_mm": [
          4.5,
          -8.1
        ]
      }
    ],
    "all_geometry_requires_final_independent_checks": true
  },
  {
    "removed_copper": [],
    "reserved_fanouts": [],
    "all_geometry_requires_final_independent_checks": true
  },
  {
    "removed_copper": [],
    "reserved_fanouts": [],
    "all_geometry_requires_final_independent_checks": true
  }
]