AnasSarkiz/NEMA14_RP2040

A NEMA motor assembly concept with a controller board, four proposed M3 screws and spacers, motor lead splices, and a JST 4-pin connector harness.

Version
1.13.0
License
ISC
Stars
0

artifacts/reference-feedback/controlled-pad-escapes.json

[
  {
    "component": "C_VCP",
    "pin": "pin2",
    "net": "PD_VBUS",
    "via_xy_mm": [
      6.525,
      -15.100000000000001
    ],
    "removed_conflicting_copper": [
      "feedback_ground_escape_pcb_port_245",
      "feedback_ground_escape_pcb_port_245_via"
    ]
  },
  {
    "component": "R_DM",
    "pin": "pin2",
    "net": "USB_DM",
    "via_xy_mm": [
      5.95,
      6.625
    ],
    "removed_conflicting_copper": [
      "freerouted_trace_126",
      "freerouted_trace_154",
      "same_side_repair_13_V3V3_7"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "GPIO29",
    "net": "DATA_PRESENT",
    "via_xy_mm": [
      4.625,
      2.2
    ],
    "removed_conflicting_copper": [
      "same_side_repair_1_TEMP_SDA_1",
      "same_side_repair_1_TEMP_SDA_1_via_80"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "DVDD23",
    "net": "V1V1",
    "via_xy_mm": [
      2.7,
      -2.125
    ],
    "removed_conflicting_copper": [
      "freerouted_trace_295"
    ]
  },
  {
    "component": "C_VREG_OUT",
    "pin": "pin1",
    "net": "V1V1",
    "via_xy_mm": [
      3.5,
      5.875
    ],
    "removed_conflicting_copper": [
      "freerouted_trace_119",
      "freerouted_trace_120",
      "freerouted_trace_61",
      "freerouted_trace_62",
      "freerouted_via_16",
      "freerouted_via_37"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "QSPI_SD0",
    "net": "QSPI_SD0",
    "via_xy_mm": [
      1.3,
      2.125
    ],
    "removed_conflicting_copper": [
      "same_side_repair_28_QSPI_SCLK_0"
    ]
  },
  {
    "component": "U_FLASH",
    "pin": "IO0",
    "net": "QSPI_SD0",
    "via_xy_mm": [
      -5.275,
      -7.175000000000001
    ],
    "removed_conflicting_copper": [
      "same_side_repair_18_V3V3_6"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "QSPI_SD2",
    "net": "QSPI_SD2",
    "via_xy_mm": [
      0.6000000000000001,
      2.125
    ],
    "removed_conflicting_copper": [
      "same_side_repair_28_QSPI_SCLK_0_via_5"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "USB_DM",
    "net": "MCU_DM",
    "via_xy_mm": [
      3.5,
      2.325
    ],
    "removed_conflicting_copper": [
      "same_side_repair_24_V1V1_0"
    ]
  },
  {
    "component": "R_DM",
    "pin": "pin1",
    "net": "MCU_DM",
    "via_xy_mm": [
      5.5,
      3.975
    ],
    "removed_conflicting_copper": [
      "same_side_repair_10_VM_SENSE_1",
      "same_side_repair_21_V3V3_9"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "USB_DP",
    "net": "MCU_DP",
    "via_xy_mm": [
      2.95,
      2.025
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "U_DRV",
    "pin": "VBB2",
    "net": "PD_VBUS",
    "via_xy_mm": [
      1.85,
      -9.0
    ],
    "removed_conflicting_copper": [
      "same_side_repair_8_B_PLUS_0"
    ]
  },
  {
    "component": "R_USB_SENSE_L",
    "pin": "pin1",
    "net": "DATA_PRESENT",
    "via_xy_mm": [
      15.675,
      14.675
    ],
    "removed_conflicting_copper": [
      "freerouted_trace_18",
      "freerouted_trace_19",
      "freerouted_trace_272"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "DVDD50",
    "net": "V1V1",
    "via_xy_mm": [
      1.9000000000000001,
      2.7750000000000004
    ],
    "removed_conflicting_copper": [
      "same_side_repair_33_QSPI_SD3_0",
      "same_side_repair_5_LED_B_0"
    ]
  },
  {
    "component": "R_XOUT",
    "pin": "pin1",
    "net": "XOUT",
    "via_xy_mm": [
      3.875,
      -7.65
    ],
    "removed_conflicting_copper": [
      "same_side_repair_28_XTAL_OUT_0",
      "same_side_repair_8_B_PLUS_0_via_9"
    ]
  },
  {
    "component": "Y_MCU",
    "pin": "pin3",
    "net": "XTAL_OUT",
    "via_xy_mm": [
      1.1,
      -5.75
    ],
    "removed_conflicting_copper": [
      "same_side_repair_35_XIN_0"
    ]
  },
  {
    "component": "R_XOUT",
    "pin": "pin2",
    "net": "XTAL_OUT",
    "via_xy_mm": [
      4.7250000000000005,
      -6.3500000000000005
    ],
    "removed_conflicting_copper": [
      "same_side_repair_16_MCU_DP_0",
      "same_side_repair_20_ENABLE_N_1"
    ]
  },
  {
    "component": "C_XOUT",
    "pin": "pin1",
    "net": "XTAL_OUT",
    "via_xy_mm": [
      5.175000000000001,
      -7.675000000000001
    ],
    "removed_conflicting_copper": [
      "same_side_repair_22_STEP_0"
    ]
  },
  {
    "component": "R_USB_SENSE_H",
    "pin": "pin2",
    "net": "DATA_PRESENT",
    "via_xy_mm": [
      -15.4,
      -0.07500000000000001
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "J_DEBUG",
    "pin": "SWCLK",
    "net": "SWCLK",
    "via_xy_mm": [
      -4.7,
      5.9
    ],
    "removed_conflicting_copper": [
      "freerouted_trace_353",
      "same_side_repair_38_PWR_LED_A_0"
    ]
  },
  {
    "component": "J_DEBUG",
    "pin": "SWDIO",
    "net": "SWDIO",
    "via_xy_mm": [
      -4.9,
      4.6000000000000005
    ],
    "removed_conflicting_copper": [
      "same_side_repair_1_VM_SENSE_0"
    ]
  },
  {
    "component": "R_TEMP_SCL",
    "pin": "pin1",
    "net": "TEMP_SCL",
    "via_xy_mm": [
      -16.5,
      -10.325000000000001
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "C_DV50",
    "pin": "pin1",
    "net": "V1V1",
    "via_xy_mm": [
      1.85,
      2.225
    ],
    "removed_conflicting_copper": [
      "same_side_repair_20_V3V3_8"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "XIN",
    "net": "XIN",
    "via_xy_mm": [
      1.3,
      -4.325
    ],
    "removed_conflicting_copper": [
      "same_side_repair_11_XOUT_0"
    ]
  },
  {
    "component": "Y_MCU",
    "pin": "pin1",
    "net": "XIN",
    "via_xy_mm": [
      -0.9,
      -6.3500000000000005
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "C_XIN",
    "pin": "pin1",
    "net": "XIN",
    "via_xy_mm": [
      -2.2,
      -7.425000000000001
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "U_BUCK",
    "pin": "SW",
    "net": "BUCK_SW",
    "via_xy_mm": [
      -6.550000000000001,
      5.1000000000000005
    ],
    "removed_conflicting_copper": [
      "same_side_repair_1_VM_SENSE_0"
    ]
  },
  {
    "component": "L_BUCK",
    "pin": "pin1",
    "net": "BUCK_SW",
    "via_xy_mm": [
      -6.0,
      4.95
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "C_BOOTSTRAP",
    "pin": "pin2",
    "net": "BUCK_SW",
    "via_xy_mm": [
      -3.25,
      8.25
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "U_BUCK",
    "pin": "BST",
    "net": "BUCK_BST",
    "via_xy_mm": [
      -4.55,
      5.3500000000000005
    ],
    "removed_conflicting_copper": [
      "freerouted_trace_73",
      "freerouted_trace_79",
      "freerouted_via_18"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "QSPI_SCLK",
    "net": "QSPI_SCLK",
    "via_xy_mm": [
      1.0,
      4.15
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "U_MCU",
    "pin": "QSPI_SD3",
    "net": "QSPI_SD3",
    "via_xy_mm": [
      1.55,
      4.325
    ],
    "removed_conflicting_copper": [
      "same_side_repair_1_DATA_VBUS_0"
    ]
  },
  {
    "component": "J_DEBUG",
    "pin": "SWCLK",
    "net": "SWCLK",
    "via_xy_mm": [
      0.45,
      5.4
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "J_DEBUG",
    "pin": "SWDIO",
    "net": "SWDIO",
    "via_xy_mm": [
      -1.6,
      5.4
    ],
    "removed_conflicting_copper": [
      "same_side_repair_25_QSPI_SS_0"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "XIN",
    "net": "XIN",
    "via_xy_mm": [
      1.35,
      -4.175
    ],
    "removed_conflicting_copper": [
      "same_side_repair_13_SWDIO_0"
    ]
  },
  {
    "component": "R_XOUT",
    "pin": "pin2",
    "net": "XTAL_OUT",
    "via_xy_mm": [
      0.125,
      -4.3500000000000005
    ],
    "removed_conflicting_copper": [
      "same_side_repair_13_SWDIO_0_via_4"
    ]
  },
  {
    "component": "C_XOUT",
    "pin": "pin1",
    "net": "XTAL_OUT",
    "via_xy_mm": [
      4.325,
      -7.300000000000001
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "D_PWR",
    "pin": "anode",
    "net": "PWR_LED_A",
    "via_xy_mm": [
      -0.9,
      7.800000000000001
    ],
    "removed_conflicting_copper": [
      "freerouted_trace_310",
      "freerouted_trace_77"
    ]
  },
  {
    "component": "D_STATUS",
    "pin": "B_NEG",
    "net": "STATUS_B_K",
    "via_xy_mm": [
      1.3,
      5.375
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "U_DRV",
    "pin": "OUT2A",
    "net": "B_PLUS",
    "via_xy_mm": [
      3.6500000000000004,
      -7.9
    ],
    "removed_conflicting_copper": [
      "feedback_fanout_pcb_port_151_via",
      "same_side_repair_0_TEMP_SCL_0",
      "same_side_repair_0_TEMP_SCL_0_via_42",
      "same_side_repair_5_MCU_DP_0_via_24"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "IOVDD49",
    "net": "V3V3",
    "via_xy_mm": [
      3.2,
      5.2250000000000005
    ],
    "removed_conflicting_copper": [
      "same_side_repair_14_USB_DP_0"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "USB_VDD",
    "net": "V3V3",
    "via_xy_mm": [
      2.6500000000000004,
      2.7750000000000004
    ],
    "removed_conflicting_copper": [
      "same_side_repair_9_RUN_1",
      "same_side_repair_9_RUN_1_via_55"
    ]
  },
  {
    "component": "D_STATUS",
    "pin": "_POS",
    "net": "DATA_VBUS",
    "via_xy_mm": [
      -0.25,
      7.625
    ],
    "removed_conflicting_copper": [
      "same_side_repair_18_V3V3_2",
      "same_side_repair_9_RUN_1_via_29"
    ]
  },
  {
    "component": "C_IO1",
    "pin": "pin1",
    "net": "V3V3",
    "via_xy_mm": [
      0.675,
      4.7
    ],
    "removed_conflicting_copper": [
      "same_side_repair_2_QSPI_SD1_0",
      "same_side_repair_2_QSPI_SD1_0_via_11"
    ]
  },
  {
    "component": "C_IO49",
    "pin": "pin1",
    "net": "V3V3",
    "via_xy_mm": [
      2.975,
      5.65
    ],
    "removed_conflicting_copper": [
      "same_side_repair_10_SWCLK_0_via_244"
    ]
  },
  {
    "component": "R_DP",
    "pin": "pin2",
    "net": "USB_DP",
    "via_xy_mm": [
      4.55,
      6.375
    ],
    "removed_conflicting_copper": [
      "same_side_repair_4_V3V3_2",
      "same_side_repair_4_V3V3_2_via_3",
      "same_side_repair_7_V3V3_5"
    ]
  },
  {
    "component": "C_VREG_IN",
    "pin": "pin1",
    "net": "V3V3",
    "via_xy_mm": [
      5.8500000000000005,
      7.175000000000001
    ],
    "removed_conflicting_copper": [
      "same_side_repair_1_PWR_LED_A_0",
      "same_side_repair_1_USB_DP_0",
      "same_side_repair_9_USB_DM_0"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "QSPI_SD1",
    "net": "QSPI_SD1",
    "via_xy_mm": [
      -0.1,
      4.075
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "C_IO33",
    "pin": "pin2",
    "net": "GND",
    "via_xy_mm": [
      7.425000000000001,
      -1.625
    ],
    "removed_conflicting_copper": [
      "same_side_repair_2_V1V1_0_layer_section_0"
    ]
  },
  {
    "component": "C_IO42",
    "pin": "pin2",
    "net": "GND",
    "via_xy_mm": [
      6.125,
      3.125
    ],
    "removed_conflicting_copper": [
      "same_side_repair_9_VM_SENSE_0_layer_section_0"
    ]
  },
  {
    "component": "U_MCU",
    "pin": "GPIO28",
    "net": "VM_SENSE",
    "via_xy_mm": [
      4.625,
      1.6
    ],
    "removed_conflicting_copper": [
      "same_side_repair_0_TEMP_SDA_0_rerouted",
      "same_side_repair_0_TEMP_SDA_0_rerouted_via_36",
      "same_side_repair_1_TEMP_SDA_1"
    ]
  },
  {
    "component": "R_RUN",
    "pin": "pin1",
    "net": "V3V3",
    "via_xy_mm": [
      -16.85,
      12.8
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "R_TEMP_SDA",
    "pin": "pin2",
    "net": "V3V3",
    "via_xy_mm": [
      9.025,
      -11.55
    ],
    "removed_conflicting_copper": []
  },
  {
    "component": "R_TEMP_SDA",
    "pin": "pin1",
    "net": "TEMP_SDA",
    "via_xy_mm": [
      10.375,
      -11.55
    ],
    "removed_conflicting_copper": []
  }
]