AnasSarkiz/NEMA14_RP2040

A NEMA motor assembly concept with a controller board, four proposed M3 screws and spacers, motor lead splices, and a JST 4-pin connector harness.

Version
1.13.0
License
ISC
Stars
0

artifacts/opposite-edge/redundant-barrel-pruning.json

[
  {
    "via": "reviewed_local_R_CC2_pin1_via",
    "net": "DATA_CC2",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_0_DATA_CC2_0_via_44",
    "net": "DATA_CC2",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_U_MCU_GPIO6_via",
    "net": "STEP",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_0_DIR_0_rerouted_rerouted_via_3",
    "net": "DIR",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_0_SLEEP_0_rerouted_via_33",
    "net": "SLEEP",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_R_SLEEP_pin1_via",
    "net": "SLEEP",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_U_MCU_GPIO28_via",
    "net": "VM_SENSE",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_U_FLASH_IO0_via",
    "net": "QSPI_SD0",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_TP_RUN_pin1_via",
    "net": "RUN",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_0_RUN_0_via_162",
    "net": "RUN",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_0_SWCLK_0_via_31",
    "net": "SWCLK",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_TP_SWCLK_pin1_via",
    "net": "SWCLK",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_6_SWCLK_0_via_4",
    "net": "SWCLK",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_1_TEMP_SDA_1_via_67",
    "net": "TEMP_SDA",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_16_TEMP_SCL_0_via_2",
    "net": "TEMP_SCL",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_R_BUZZER_GATE_pin1_via",
    "net": "BUZZER_PWM",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_35_BUZZER_GATE_1_via_40",
    "net": "BUZZER_GATE",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_Q_STATUS_R_pin2_via",
    "net": "LED_R",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_0_LED_G_0_via_50",
    "net": "LED_G",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_32_STATUS_G_C_1_via_64",
    "net": "STATUS_G_C",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "same_side_repair_0_STATUS_B_C_0_via_21",
    "net": "STATUS_B_C",
    "physical_pad_partitions_unchanged": true
  },
  {
    "via": "reviewed_local_R_USB_SENSE_L_pin2_via",
    "net": "GND",
    "physical_pad_partitions_unchanged": true
  }
]