AnasSarkiz/NEMA14_RP2040
A NEMA motor assembly concept with a controller board, four proposed M3 screws and spacers, motor lead splices, and a JST 4-pin connector harness.
- Version
- 1.13.0
- License
- ISC
- Stars
- 0
artifacts/manufacturing/audit.json
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[
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[
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],
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129,
131
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},
{
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[
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[
"USB_DM"
]
],
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213,
245
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},
{
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"conductors": [
[
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[
"QSPI_SD1"
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],
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69,
148
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},
{
"clearance_mm": 0.15597252445571286,
"conductors": [
[
"BUZZER_SINK"
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[
"VM_SENSE"
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],
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295,
309
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},
{
"clearance_mm": 0.1560185700404421,
"conductors": [
[
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[
"QSPI_SD2"
]
],
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64,
65
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}
],
"screen_minimum_mm": 0.15,
"geometry_tolerance_mm": 0.0002,
"scope": "actual finished copper edges; pairs within 0.50 mm; same electrical net excluded"
},
"bottom": {
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"closest_pairs": [
{
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"conductors": [
[
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[
"USB_DM"
]
],
"island_indices": [
315,
367
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},
{
"clearance_mm": 0.15407377259755534,
"conductors": [
[
"PD_VBUS"
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[
"DATA_CC2"
]
],
"island_indices": [
413,
534
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},
{
"clearance_mm": 0.15477594044293963,
"conductors": [
[
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[
"V3V3"
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],
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417,
418
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},
{
"clearance_mm": 0.15477594044293963,
"conductors": [
[
"V3V3"
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[
"TEMP_SDA"
]
],
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418,
419
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},
{
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"conductors": [
[
"QSPI_SD1"
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[
"V3V3"
]
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354,
432
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}
],
"screen_minimum_mm": 0.15,
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"scope": "actual finished copper edges; pairs within 0.50 mm; same electrical net excluded"
},
"inner1": {
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{
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"conductors": [
[
"GND"
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[
"ENABLE_N"
]
],
"island_indices": [
553,
719
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},
{
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"conductors": [
[
"V3V3"
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[
"QSPI_SD1"
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],
"island_indices": [
668,
679
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},
{
"clearance_mm": 0.15597252445571286,
"conductors": [
[
"VM_SENSE"
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[
"BUZZER_SINK"
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],
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798,
800
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},
{
"clearance_mm": 0.1560185700404421,
"conductors": [
[
"QSPI_SS"
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[
"QSPI_SD2"
]
],
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618,
619
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},
{
"clearance_mm": 0.16240225950087056,
"conductors": [
[
"PD_VBUS"
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[
"TEMP_SCL"
]
],
"island_indices": [
769,
771
]
}
],
"screen_minimum_mm": 0.15,
"geometry_tolerance_mm": 0.0002,
"scope": "actual finished copper edges; pairs within 0.50 mm; same electrical net excluded"
},
"inner2": {
"minimum_distinct_conductor_clearance_mm": 0.15520637579752466,
"closest_pairs": [
{
"clearance_mm": 0.15520637579752466,
"conductors": [
[
"V3V3"
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[
"QSPI_SD1"
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917,
934
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},
{
"clearance_mm": 0.15597252445571286,
"conductors": [
[
"VM_SENSE"
],
[
"BUZZER_SINK"
]
],
"island_indices": [
1036,
1039
]
},
{
"clearance_mm": 0.1560185700404421,
"conductors": [
[
"QSPI_SS"
],
[
"QSPI_SD2"
]
],
"island_indices": [
869,
871
]
},
{
"clearance_mm": 0.16179173424123605,
"conductors": [
[
"LOGIC_IN"
],
[
"DATA_VBUS"
]
],
"island_indices": [
900,
911
]
},
{
"clearance_mm": 0.16193620190511157,
"conductors": [
[
"PD_VBUS"
],
[
"PD_CC1"
]
],
"island_indices": [
832,
863
]
}
],
"screen_minimum_mm": 0.15,
"geometry_tolerance_mm": 0.0002,
"scope": "actual finished copper edges; pairs within 0.50 mm; same electrical net excluded"
}
},
"paste": {
"F_Paste": {
"bare_interface_overlap_mm2": 0.0,
"manual_plated_joint_overlap_mm2": 0.0,
"outside_smt_copper_mm2": 0.0
},
"B_Paste": {
"bare_interface_overlap_mm2": 0.0,
"manual_plated_joint_overlap_mm2": 0.0,
"outside_smt_copper_mm2": 0.0
}
},
"assembly_tables": {
"bom.csv": {
"rows": 82,
"bare_rows": [],
"missing_fitted": [],
"unexpected": [],
"duplicate_refs": [],
"source_identity_errors": []
},
"pick_and_place.csv": {
"rows": 82,
"bare_rows": [],
"missing_fitted": [],
"unexpected": [],
"duplicate_refs": []
}
},
"cpl_coordinate_comparison": {
"errors": [],
"origin": "board center; mm; unmirrored top coordinates",
"rotation": "native imported land-pattern orientation plus saved pcb_component rotation; supplier interpretation still needs placement-preview approval",
"status": "SOURCE CONVENTION CHECK ONLY; supplier pickup datum and rotation remain USER_REVIEW",
"USB_centers": [
{
"reference": "J_PD",
"CPL_land_pattern_center_mm": {
"x": 0.6000000000000001,
"y": 15.149999999999999
},
"rotation_deg": 0
},
{
"reference": "J_DATA",
"CPL_land_pattern_center_mm": {
"x": -4.6,
"y": -15.149999999999999
},
"rotation_deg": 0
}
],
"USB_center_note": "Upright GCT USB4145 uses native land-pattern CPL datum; local CAD anchor correction X +0.1524952 mm aligns the native STEP centre. Manufacturer pickup datum and JLCPCB placement preview remain unverified."
},
"drill_source_comparison": {
"missing_mm2": 0.0,
"extra_mm2": 0.0,
"tolerance_mm": 0.00055,
"tolerance_reason": "Exporter slot endpoints and CPL rounded to 3 decimal places; 0.55 micrometer envelope",
"nominal_mounting_holes": 4,
"nominal_USB_plated_slots": 8
},
"mask_opening_comparison": {
"errors": [],
"policy": "uncovered fitted/bare solder pads and plated slots remain open; filled/capped thermal via process required"
},
"stencil_release_screen": {
"candidate_thickness_mm": 0.1,
"minimum_aspect_ratio": 1.7999999999999972,
"minimum_area_ratio": 0.7285732426111883,
"screen_limits": {
"aspect_ratio": 1.5,
"area_ratio": 0.66
},
"failing_apertures": [],
"scope": "common geometric release screens only; physical paste/stencil/reflow process acceptance still pending"
},
"exposed_pad_stencil": [
{
"ref": "U_PD",
"pad": "pcb_smtpad_42",
"coverage_fraction": 0.5999993781007402
},
{
"ref": "U_MCU",
"pad": "pcb_smtpad_49",
"coverage_fraction": 0.6000005636331531
},
{
"ref": "U_DRV",
"pad": "pcb_smtpad_195",
"coverage_fraction": 0.5999998140218563
}
],
"board_outline": {
"bounds_including_stroke": [
-17.525,
-17.525,
17.525,
17.525
],
"centerline_bounds_mm": [
-17.5,
-17.5,
17.5,
17.5
],
"closed_contour_count": 1,
"centerline_length_mm": 140.0,
"centerline_area_mm2": 1225.0,
"valid_35mm_square": true
},
"mask_webs": {
"F_Mask": {
"minimum_web_mm": 0.1996190000000002,
"opening_polygons": 337,
"scope": "nearest distinct mask openings within 0.25 mm"
},
"B_Mask": {
"minimum_web_mm": null,
"opening_polygons": 26,
"scope": "nearest distinct mask openings within 0.25 mm"
}
},
"mask": {
"F_Mask": {
"area_mm2": 259.80208103676864,
"bounds_mm": [
-17.240000000000002,
-17.240000000000002,
17.149838,
17.204936
]
},
"B_Mask": {
"area_mm2": 54.35339123950722,
"bounds_mm": [
-14.6,
-17.129891999999998,
14.6,
17.129891999999998
]
}
},
"plated_annulus_source_min_mm": 0.07500000000000001,
"copper_clearances": {
"top": {
"mount_hole_edge_clearance_mm": 1.7681880674369095,
"board_edge_clearance_mm": 0.259999999999998
},
"bottom": {
"mount_hole_edge_clearance_mm": 1.7681880674369095,
"board_edge_clearance_mm": 0.3500000000000014
},
"inner1": {
"mount_hole_edge_clearance_mm": 1.7958235445932176,
"board_edge_clearance_mm": 0.3500000000000014
},
"inner2": {
"mount_hole_edge_clearance_mm": 1.7681880674369095,
"board_edge_clearance_mm": 0.3500000000000014
}
},
"actual_keepout_checks": [
{
"keepout_id": "pcb_keepout_0",
"shape": "circle",
"center_mm": {
"x": -13,
"y": -13
},
"layer": "top",
"clearance_mm": 0.18602907216069745,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_0",
"shape": "circle",
"center_mm": {
"x": -13,
"y": -13
},
"layer": "inner1",
"clearance_mm": 0.19998449770955515,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_0",
"shape": "circle",
"center_mm": {
"x": -13,
"y": -13
},
"layer": "inner2",
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"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_0",
"shape": "circle",
"center_mm": {
"x": -13,
"y": -13
},
"layer": "bottom",
"clearance_mm": 0.19998449770955515,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_1",
"shape": "circle",
"center_mm": {
"x": -13,
"y": 13
},
"layer": "top",
"clearance_mm": 0.168190752658608,
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},
{
"keepout_id": "pcb_keepout_1",
"shape": "circle",
"center_mm": {
"x": -13,
"y": 13
},
"layer": "inner1",
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},
{
"keepout_id": "pcb_keepout_1",
"shape": "circle",
"center_mm": {
"x": -13,
"y": 13
},
"layer": "inner2",
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},
{
"keepout_id": "pcb_keepout_1",
"shape": "circle",
"center_mm": {
"x": -13,
"y": 13
},
"layer": "bottom",
"clearance_mm": 0.16819075265860747,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_2",
"shape": "circle",
"center_mm": {
"x": 13,
"y": -13
},
"layer": "top",
"clearance_mm": 0.1863607055535805,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_2",
"shape": "circle",
"center_mm": {
"x": 13,
"y": -13
},
"layer": "inner1",
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},
{
"keepout_id": "pcb_keepout_2",
"shape": "circle",
"center_mm": {
"x": 13,
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},
"layer": "inner2",
"clearance_mm": 0.16819075265860747,
"intrusion_area_mm2": 0.0,
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},
{
"keepout_id": "pcb_keepout_2",
"shape": "circle",
"center_mm": {
"x": 13,
"y": -13
},
"layer": "bottom",
"clearance_mm": 0.19998449770955537,
"intrusion_area_mm2": 0.0,
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},
{
"keepout_id": "pcb_keepout_3",
"shape": "circle",
"center_mm": {
"x": 13,
"y": 13
},
"layer": "top",
"clearance_mm": 0.168190752658608,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_3",
"shape": "circle",
"center_mm": {
"x": 13,
"y": 13
},
"layer": "inner1",
"clearance_mm": 0.195905682230062,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_3",
"shape": "circle",
"center_mm": {
"x": 13,
"y": 13
},
"layer": "inner2",
"clearance_mm": 0.16819075265860747,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
},
{
"keepout_id": "pcb_keepout_3",
"shape": "circle",
"center_mm": {
"x": 13,
"y": 13
},
"layer": "bottom",
"clearance_mm": 0.16819075265860747,
"intrusion_area_mm2": 0.0,
"intrusion_beyond_0_0002mm_tolerance_mm2": 0.0
}
],
"silkscreen_clearances": {
"F_SilkScreen": {
"overlap_mask_openings_mm2": 0.0,
"inside_0_15mm_mask_guard_mm2": 0.0,
"outside_board_0_10mm_inset_mm2": 0.0
},
"B_SilkScreen": {
"overlap_mask_openings_mm2": 0.0,
"inside_0_15mm_mask_guard_mm2": 0.0,
"outside_board_0_10mm_inset_mm2": 0.0
}
},
"paste_source_comparison": {
"F_Paste": {
"missing_mm2": 0.0,
"extra_mm2": 0.0
},
"B_Paste": {
"missing_mm2": 0.0,
"extra_mm2": 0.0
}
},
"status": "PASS"
}