AnasSarkiz/Game-Boy-Enhance

s4/CPU-PACKAGE-REVIEW.md

# S4 component using an imported S3 package

On 2026-09-06 the user explicitly authorized reusing the S3 supplier footprint and setting the MPN to **T113M4020DC0 (S4)**. This supersedes the earlier prohibition on S3 package reuse, while preserving the ban on handwritten footprints and on ordering an unintended substitute processor.

## Implemented identity and provenance

| Purpose | Component |
|---|---|
| Geometry, pin labels and 3D model source | T113-S3, JLCPCB C5197687, `imports/T113_S3.tsx` |
| Actual selected processor MPN | **T113M4020DC0** |
| Actual selected JLCPCB ordering number | **C41411351** |
| Component to use in the new circuit | `components/T113M4020DC0.tsx` |

The original import was generated by `tsci import C5197687 --jlcpcb --use-exact-footprint` from `s4/`. It remains byte-for-byte unchanged. The wrapper uses supported component props to override both procurement fields. It does not replace pads, rename pins or manufacture a new footprint. Its public type excludes changes to identity, geometry, pin labels/attributes and the inherited model. The S4 definition itself now assigns required power, ground and internal-LDO roles through supported chip props. The model remains S3-sourced and is not an independently verified S4 mechanical model.

The [Trellis author describes S4 as pin-compatible with S3](https://github.com/protolux-electronics/trellis_core/tree/db4fe71623c14bcea47d7457d0db4c99d3899124). The [S4 supplier listing](https://jlcpcb.com/partdetail/T113M4020DC0/C41411351) specifies eLQFP-128, 14 × 14 mm. These support investigating reuse; they do not substitute for exact S4 package tolerances or electrical specifications.

## Verified checks

- 129 copper pads and numbered ports, including exposed ground pad 129.
- All 129 primary pin labels match the pinned Trellis CPU table by physical pin number after removing the reference's `_number` label suffix. This is reference agreement, not independent S4 datasheet verification.
- Closed imported courtyard contains every pad; no pad bounding boxes overlap. Minimum clearance between pad bounds is 0.199542 mm, and lead pitch is approximately 0.4 mm.
- Compiled package preview retains every imported pad position, shape and dimension and the exact courtyard. Its procurement record contains `T113M4020DC0` / `C41411351`.
- Preview connects AGND 91 and EPAD 129 to GND, leaves NC 106 unconnected, contains no DNP components, copper routes or vias, and uses a schematic sheet and functional section.
- Isolated placement check: zero errors/warnings. This is one package on a 30 × 30 mm inspection board, not a complete console placement test.

## Outstanding qualification

The imported exposed-ground land is **5.5999888 × 5.5999888 mm**. The [Allwinner S3 datasheet, section 7.2, printed page 78](https://dl.linux-sunxi.org/T113-S3/T113-S3_Datasheet_v1.6_20220303.pdf), specifies a **5.72 mm** exposed package pad. Package metal and PCB land dimensions need not be identical, so this alone does not establish a defect. Obtain the exact S4 package and assembly recommendations to qualify ground-land coverage, solder-mask/paste openings, thermal vias and pin-1 orientation. The imported geometry is not altered to conceal this difference.

The raw import lacks required-power annotations. The S4 definition now requires all 20 supply inputs, both internal LDO outputs and ground pins 91/129 to be connected, while keeping NC106 unconnected. These roles follow the family datasheet and the S4 reference; exact S4 voltage limits remain unqualified. The isolated inspection fixture intentionally leaves 22 of those required pins floating, and the negative audit verifies the resulting errors. The connected `power-core.circuit.tsx` stage satisfies the same checks. No missing-connection diagnostic is suppressed.

Exact S4 power rails, sequencing, pinmux, clocks/reset and memory initialization remain unqualified. [U-Boot development testing](https://lists.denx.de/pipermail/u-boot/2025-September/598489.html) demonstrated that S4 required a memory-initialization update to boot; do not assume an arbitrary S3 firmware image works. No full-board copper DRC or prototype functionality test has been performed.

## Reproduce

```sh
bun run typecheck
bun run audit:s4:imports
tsci check netlist s4/previews/cpu-package.circuit.tsx
tsci check placement s4/previews/cpu-package.circuit.tsx
bun run build:s4:cpu-preview
bun run audit:s4:cpu
```

The last audit checks actual compiled output, including S4 ordering identity, source geometry preservation and pin-map agreement. Its report records all emitted warnings. Preview artifacts are generated in `dist/s4/previews/cpu-package/`; they are inspection outputs, not manufacturing files.