0hmX/robocraze-ov7670-camera-module-clone

README.md

# Electrobot OV7670 VGA camera module interface clone

Standalone, FIFO-less OV7670 module matching the functional and external
contract of Amazon ASIN [B0FDRCHSFW](https://www.amazon.in/dp/B0FDRCHSFW).
The board exposes the conventional 2×9, 2.54 mm camera header, four mounting
holes, an external XCLK input, SCCB control, and the 8-bit parallel DVP bus.
It does not contain a frame FIFO, microcontroller carrier, or host-specific
adapter.

The OV7670 provides a 640×480 active array, up to 30 fps VGA operation, and
8-bit YUV/YCbCr 4:2:2, RGB565/555/444, GRB 4:2:2, and raw RGB output. The
sensor and qualified 1/6-inch lens/holder are customer-supplied or consigned;
the regulators and feasible support parts are JLC/LCSC-first.

## Electrical interface and host limitations

- Supply pin 1 with regulated **3.3 V**. The board generates 2.8 V analog/I/O
  power and 1.8 V core power. It is not a 5 V-powered module.
- The sensor's DOVDD is 2.8 V. There are no onboard logic-level translators.
  A 5 V host therefore needs external translation or buffering on XCLK, SCCB,
  RESET#, and PWDN, and must not drive those pins directly. A 3.3 V high is at
  the OV7670 absolute limit of DOVDD + 0.5 V, so 2.8 V logic or a qualified
  translator is preferred.
- The module's 2.8 V data outputs must satisfy the receiving host's input-high
  threshold. SCCB pull-ups are not fitted; provide host-side pull-ups to 2.8 V.
- “Arduino/Uno compatible” has the same interface meaning as the reference
  listing, not direct 5 V electrical or performance compatibility. A host
  still needs enough GPIO, clocking, memory, and capture bandwidth for an
  8-bit parallel pixel bus; small AVR boards generally require reduced modes
  and carefully engineered capture code.

## Header pinout

| Pin | Signal | Pin | Signal |
| ---: | --- | ---: | --- |
| 1 | 3V3 power | 2 | GND |
| 3 | SIO_C | 4 | SIO_D through R4 |
| 5 | VSYNC | 6 | HREF |
| 7 | PCLK | 8 | XCLK (external) |
| 9 | D7 | 10 | D6 |
| 11 | D5 | 12 | D4 |
| 13 | D3 | 14 | D2 |
| 15 | D1 | 16 | D0 |
| 17 | RESET# | 18 | PWDN |

J1 uses the exact imported LCSC C492426 footprint and CAD model. It is placed
on the bottom/rear side, mates from below, and remains a manual through-hole
operation rather than being falsified as an SMT CPL placement.

## Power tree and current budget

- U1: ME6211C28M5G-N, fixed 2.8 V, LCSC C53099.
- U2: ME6211C18M5G-N, fixed 1.8 V, LCSC C236671, cascaded from 2.8 V.
- Both are current Microne ME6211-family parts with enable high at 1.0 V
  minimum, 6.0 V operating range, 6.5 V absolute maximum, low-ESR ceramic-cap
  compatibility, and 1 µF minimum input/output capacitors. CE is tied to the
  relevant input rail and pin 4 is NC.
- The datasheet gives typical dropout at 100 mA of 110 mV for 2.8 V and
  200 mV for 1.8 V. At the module's much lower load, 3.3→2.8 V and
  2.8→1.8 V both have substantial headroom. Output capability is 450 mA for
  the 2.8 V option and 300 mA for the 1.8 V option under the datasheet's stated
  VIN = VOUT + 1 V test condition.

The OV7670 datasheet publishes **60 mW typical**, not a guaranteed maximum, at
15 fps VGA YUV. Dividing that by the lowest rail gives a deliberately
conservative 33.4 mA aggregate sensor-current bound; the routing allocation is
rounded to 40 mA. At 40 mA, estimated regulator dissipation is about 20 mW for
U1 and 40 mW for U2. This is an engineering budget, not a substitute for
measuring rail currents and startup transients on the first article.

Microne's official product catalog still lists the ME6211 family. Local `tsci
search --jlcpcb --json` snapshots on 2026-08-24 reported 15,900 units of
C53099 and 44,113 units of C236671. Stock is volatile and must be rechecked
before ordering.

## PCB stack, routing, and power integrity

- 35.16 × 34.29 mm, four layers, 1.6 mm FR-4.
- Top and bottom carry signals/components; inner1 is a connected V2V8 plane
  and inner2 is a connected GND plane.
- Requested trace classes: 0.30 mm for 3V3 and primary ground, 0.25 mm for LDO
  input/output and V2V8 distribution, 0.20 mm for filtered AVDD/DOVDD/DVDD and
  meaningful returns, and 0.15 mm for ordinary interface signals.
- 0.10 mm is reserved for demonstrated CSP escape geometry. XCLK and VREF1
  use short reserved dogbones. HREF uses 0.10 mm only through the ball field,
  changes to 0.15 mm after its via, and follows a fixed bottom route to J1.
  The router may also neck D6 and VREF2 to 0.10 mm at their CSP exits.
- Board rules assert 0.10 mm minimum trace width, 0.10 mm trace-to-pad and
  pad-to-pad clearance, 0.45/0.20 mm via pad/drill, 0.20 mm via-hole spacing,
  and 0.30 mm board-edge margin. Power-expansion tapers between nominal width
  classes are expected; no routed wire is below 0.10 mm.

C12, C13, and C14 were moved to the nearest positions outside the modeled
19 × 19 mm holder courtyard. Their center distances from AVDD, VREF1, and
VREF2 are now approximately 9.15 mm, 10.25 mm, and 10.47 mm. DOVDD and DVDD
local capacitors remain about 12.31 mm and 11.21 mm away because no supplier
mechanical drawing proves that bottom-side placement under the holder is safe.
These distances still require first-article power-integrity validation.

## JLC/LCSC assembly split

| Function | Part | LCSC/JLC | Assembly |
| --- | --- | --- | --- |
| 2.8 V LDO | ME6211C28M5G-N | C53099 | JLC SMT, imported exact footprint |
| 1.8 V LDO | ME6211C18M5G-N | C236671 | JLC SMT, imported exact footprint |
| 2×9 rear header | PZ254V-12-18P | C492426 | Manual rear-side THT |
| 100 nF 0603 | CC0603KRX7R9BB104 | C14663 | JLC SMT |
| 1 µF 0603 | CL10A105KB8NNNC | C15849 | JLC SMT |
| 4.7 µF 0603 | CL10A475KO8NNNC | C19666 | JLC SMT |
| 10 µF 0603 | CL10A106KP8NNNC | C19702 | JLC SMT; verify DC-bias derating |
| 10 Ω filters | 0603WAF100JT5E | C22859 | JLC SMT |
| 1 kΩ SIO_D series | 0603WAF1001T5E | C21190 | JLC SMT |
| 10 kΩ RESET# pull-up | FRC0603F1002TS | C2906982 | JLC SMT |
| Sensor | OV7670-VL2A | unavailable in JLC search | Consigned CSP assembly |
| Lens and holder | qualified 1/6-inch optical set | unresolved | Consigned/manual optical assembly |

Generated manufacturing files separate these categories explicitly:

- `jlc_bom.csv` and `jlc_cpl.csv`: verified placed JLC SMT designators only;
  their designator sets must match.
- `manual_assembly.csv`: J1, U3, and the U3 optical subassembly.
- `dnp.csv`: optional R0 and D0_IND only.
- `assembly_notes.txt`: process boundaries and handling notes.

## Verification and first-article status

```sh
bun install
bun run verify:production
bun run export:kicad
```

`verify:production` runs type checking, a rendered production build, Gerber
export, all-layer Gerber short detection, and assertions for trace classes,
vias, inner planes, board rules, JLC BOM/CPL equality, imported U1/U2 parts,
manual/consigned items, and DNPs.

The generated electrical/fabrication data can be used to quote and order a
controlled first article after the selected OV7670 and holder are measured.
Volume release remains blocked by physical facts that software cannot certify:

1. Measure the exact reference board envelope, mounting-hole centers, holder
   screw geometry, optical-axis position, and total lens height. Current holder
   holes and the 19 mm courtyard are photo-derived placeholders.
2. Qualify the OV7670 source, 0.30 mm CSP land/paste/mask rules, stencil,
   reflow profile, bottom-side clearance, lens installation, and optical
   alignment. U3 is not turnkey JLC stock.
3. Measure each rail at startup, standby, and active VGA modes; verify noise,
   XCLK integrity, DVP timing/skew, image capture, thermals, and reflow yield.
4. Confirm the selected fabricator accepts the 0.10/0.10 mm CSP escape, 0.20 mm
   drills, and four-layer stack before placing the first-article order.

## Public exports

```tsx
import {
  RobocrazeOV7670CameraModuleBoard,
  RobocrazeOV7670Module,
  OV7670Sensor,
  OV7670CSP2Footprint,
  OV7670CameraAssemblyFootprint,
  RobocrazeOV7670ModuleHostFootprint,
  ME6211C28M5G_N,
  ME6211C18M5G_N,
  PZ254V_12_18P,
  PZ254V_12_18P_Footprint,
} from "@tsci/0hmX.robocraze-ov7670-camera-module-clone"
```

`RobocrazeOV7670CameraModuleBoard` is the default standalone PCB and
`RobocrazeOV7670Module` is its reusable host-footprint wrapper.

## References

- Exact product target: https://www.amazon.in/dp/B0FDRCHSFW
- OmniVision OV7670 datasheet v1.4: https://web.mit.edu/6.111/www/f2015/tools/OV7670_2006.pdf
- OmniVision SCCB specification: https://file.hstatic.net/1000180878/file/omnivision_technologies_seril_camera_control_bus_sccb__specification.pdf
- Microne ME6211 family page: https://www.microne.com.cn/product/20.html
- ME6211 family datasheet: https://datasheet.lcsc.com/datasheet/pdf/2079c21a565bb18f68c1d4daad5e823a.pdf
- LCSC C53099: https://www.lcsc.com/product-detail/C53099.html
- LCSC C236671: https://www.lcsc.com/product-detail/C236671.html
- JLCPCB capabilities: https://jlcpcb.com/capabilities/pcb-capabilities/