0hmX/ov7670-camera-module

README.md

# Bare OV7676 camera PCB

A standalone tscircuit camera PCB using the **bare 20-ball OV7676 CSP image
sensor**. There is no prebuilt camera board or camera module in this design.

The PCB footprint exposes the sensor's real 5 x 4 solder-ball array: 0.520 mm
column pitch, 0.480 mm row pitch, and twenty 0.250 mm circular lands. The sensor
is wrapped in a tscircuit `<breakout>` with twenty explicit breakout points.

## Current status

- Netlist, source, pin specification, schematic placement, and PCB placement
  checks pass with zero errors and zero warnings.
- Routing is enabled on a four-layer PCB in two phases. The OV7676 breakout
  phase successfully routes all 20 of 20 CSP balls to explicit radial breakout
  points. The following 23-net board phase currently fails on one remaining
  autorouter node, so this revision is not fabrication-ready yet.
- All 75 named logical `<trace>` elements remain present and every net endpoint
  is connected. `U4.pin1` is the only unused pin and is explicitly marked
  no-connect. The failed board phase does not commit its partial copper to the
  final Circuit JSON; the successful sensor fan-out is preserved in
  `dist/autorouter-pipeline1-10x/phase-0.output.traces.json` and
  `dist/autorouter-pipeline1-10x/phase-0-routed.png`.
- The board uses black solder mask, as recommended by OmniVision for this CSP
  package to reduce image artifacts caused by light passing through the PCB.
- No 3D sensor or lens model is included.

## 18-pin interface

| Pin | Signal | Direction / behavior |
| ---: | --- | --- |
| 1 | `3V3` | Module power input |
| 2 | `GND` | Ground |
| 3 | `SIOC` | SCCB clock, pulled to 2.8 V |
| 4 | `SIOD` | SCCB data, pulled to 2.8 V |
| 5 | `VSYNC` | Frame timing output |
| 6 | `HREF` | Line timing output |
| 7 | `PCLK` | Pixel clock output |
| 8 | `XCLK` | Host clock input, buffered to 2.8 V |
| 9...16 | `D7...D0` | Eight-bit pixel data output |
| 17 | `RESET` | Active-low reset/shutdown input |
| 18 | `PWDN` | Active-high power-down input |

The dual-NOR control circuit implements:

```text
XSHUTDOWN = RESET AND NOT(PWDN)
```

This preserves the common OV7670-module convention: `RESET=1` and `PWDN=0`
for normal operation. `RESET` has a 10 kOhm pull-up; `PWDN` has a 10 kOhm
pull-down.

The host SCCB pins must be open-drain. Do not add external pull-ups to 3.3 V;
the PCB already pulls `SIOC` and `SIOD` to the sensor's 2.8 V I/O rail.

## Power and clock

- `U2` (`C347374`, XC6206P282MR) regulates 3.3 V to 2.8 V.
- AVDD, DOVDD, and VN use the manufacturer's reference decoupling values.
- The sensor decoupling capacitors are bottom-mounted beside the CSP.
- `U4` (`C7836`, SN74LVC1G17DBVR) accepts the 3.3 V host XCLK and produces a
  fast 2.8 V clock for the sensor.
- `U3` (`C94600`, SN74LVC2G02DCTR) implements RESET/PWDN polarity conversion.

## JLCPCB/LCSC sourcing

All placed parts carry JLCPCB/LCSC part numbers. Passives use stocked 0603
parts, and the regulator, logic, and header use imported exact JLCPCB
footprints.

The sensor is mapped to historical LCSC part `C17317227`
(`OV07676-H20A`). Its [LCSC product page](https://www.lcsc.com/product-detail/C17317227.html)
exists, but it is not currently returned by the tscircuit JLC search/parts
engine. That means the PCB is **not presently a one-click JLC assembly order**:
the sensor requires renewed stock, pre-order/consignment, or manual sourcing.
There is currently no cataloged bare VGA parallel sensor that can be substituted
without redesigning the interface.

## Optical assembly

This is a bare image sensor PCB, so a lens and holder are still required. The
9 mm circle on the PCB is a visual keep-out guide only; it is not a verified
mounting pattern for a specific lens holder. Select the optical assembly before
fabrication and replace that guide with its manufacturer-qualified mechanical
footprint.

Sensor row A is oriented toward the bottom of the PCB in accordance with the
manufacturer's usual optical mounting guidance. See the
[official OV7676 product brief](https://www.omnivision-group.com/files/pd/file/OV7676-PB-v1.5-WEB.pdf).

## Build and validate

```sh
bun install
bun run typecheck
bunx tsci check netlist
bunx tsci check pin_specification
bunx tsci check source
bunx tsci check schematic-placement
bunx tsci check placement
bunx tsci build --disable-parts-engine --ignore-errors --ignore-routing-drc \
  --pcb-png --schematic-png --svgs \
  --autorouter-debug \
  --autorouter-debug-dir dist/autorouter-pipeline1-10x \
  --autorouter-dump-srj all \
  --autorouter-timeout 2m
```