0hmX/am62l-lpddr4-clean

This code defines the hardware connections and routing logic for a DDR memory interface, specifying physical signal mappings between the system-on-chip (SoC) and DDR memory components, including connections for data, address, clock, reset, and power/ground balls.

Version
1.0.0
License
unset
Stars
0

dist/index.d.ts

import * as react from 'react';

declare const _default: () => any;

export { _default as default };