0hmX/am3352-ddr-track-c-stackup-wip-20261007

connections.ts

import cpuNets from "./data/cpu-connections.json"
import { pinLabels as cpuLabels } from "./components/AM3352"
import { pinLabels as ramLabels } from "./imports/W631GG6MB_12"

const controlNets: Record<string, string> = {
  ODT: "DDR_ODT", CKE: "DDR_CKE", CK: "DDR_CK", N_CK: "DDR_CKn",
  N_CS: "DDR_CSn0", N_RESET: "DDR_RESETn", N_RAS: "DDR_RASn",
  N_CAS: "DDR_CASn", N_WE: "DDR_WEn", DML: "DDR_DQM0", DMU: "DDR_DQM1",
  DQSL: "DDR_DQS0", N_DQSl: "DDR_DQSn0", DQSU: "DDR_DQS1",
  N_DQSU: "DDR_DQSn1", ZQ: "DDR_ZQ",
}

export function ramNet(signal: string): string | undefined {
  if (signal.startsWith("VSS")) return "GND"
  if (signal.startsWith("VDD")) return "DDR_1V5"
  if (signal.startsWith("VREF")) return "DDR_VREF"
  if (/^DQL\d/.test(signal)) return `DDR_D${signal.slice(3)}`
  if (/^DQU\d/.test(signal)) return `DDR_D${8 + Number(signal.slice(3))}`
  if (/^A\d+$/.test(signal) || /^BA\d/.test(signal)) return `DDR_${signal}`
  return controlNets[signal]
}

const cpuByBall: Record<string, string> = cpuNets
export const cpuConnections = Object.fromEntries(Object.entries(cpuLabels)
  .flatMap(([pin, [ball]]) => cpuByBall[ball] ? [[pin, `net.${cpuByBall[ball]}`]] : []))
export const ramConnections = Object.fromEntries(Object.entries(ramLabels)
  .flatMap(([pin, [, signal]]) => ramNet(signal) ? [[pin, `net.${ramNet(signal)}`]] : []))

export const ddrSignals = Object.entries(ramLabels).flatMap(([ramPin, [, signal]]) => {
  const net = ramNet(signal)
  if (!net || ["GND", "DDR_1V5", "DDR_VREF", "DDR_ZQ"].includes(net)) return []
  const cpu = Object.entries(cpuLabels).find(([, [ball]]) => cpuByBall[ball] === net)
  if (!cpu) throw new Error(`No controller terminal for ${net}`)
  return [{ net, cpuPin: cpu[0], ramPin }]
})